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Overview
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Faraday's PeripheralComposer (PC-1) is the
industry's first silicon-proven structured ASIC chip
which pre-diffuses a 190MHz ARM architecture
processor, USB2.0, Ethernet, 802.11b and other IP
blocks in the base array, while remains flexible for
customization and differentiation.
The
USB, Ethernet and 802.11 have become the most
adopted interconnect functions in thousands of
applications. However, for system products with
100,000 or less annual unit requirements, what
designers really need is a solution that combines
the flexibility of FPGA with the price/performance
advantage of ASSP. Since the PC-1 has embedded
essential IP blocks in a standard-cell base array,
it features excellent die size even though it's a
structured ASIC.
Faraday's
industry leading structured ASIC technology allows customers
to add pre-verified IP or customer proprietary logic
in order to meet their specific application demands.
Faraday's Metal Programmable Cell Array (MPCA) allows
customization of logic functions using 3 metal layers
with 70% density, and 90% of the performance of standard
cell logic.
Traditional
ASIC customers can benefit from the integration level
of PC-1, reducing product risk, time to market, and
non-recurring engineering (NRE) expenses. In addition,
the manufacturing lead time is reduced to 25 days for
a 0.18 um structured ASIC. By leveraging the flexibility
of a fully programmable solution with hardware prototyping
capabilities, product time to market can be decreased
from a year and a half to less than 6 months.
Traditional
ASSP customers can benefit from improved density and
unit cost by replacing the "microprocessor plus
FPGA" solution with the PC-1. The capability to
differentiate products on both integration and increased
functionality can translate to lower bill of materials
and more competitive product functions.
Common
application areas for the PC-1 include industrial automation,
consumer electronics, and communication-centric devices.
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PeripheralComposer
Block Diagram |
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Product
Specifications
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FA526
CPU:
190 MHz
32-bit ARMv4 Instruction Compatible CPU
Memory Management Unit (MMU)
16K Instruction Cache, 16K Data Cache
JTAG ICE
Sensor Input:
8-channel ADC
10-bit resolution
200 KSPS
USB:
1 USB 2.0 OTG Controller & PHY
1 USB 2.0 Device Controller & PHY
10/100 Ethernet:
10/100 Ethernet MAC
2nd MAC can be implemented in customer logic
MII Interface to external PHY
Encryption Engine
DES / Triple-DES / AES encryption / decryption compliant
with NIST standard
AES 128/192/256-bit keys
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Memory
Controllers:
Static Memory Controller supports SRAM, and Flash
SDRAM Controller
802.11b
Wireless LAN:
AD/DA for RX/TX
Silicon proven MAC & BaseBand available
Customer Logic:
250K usable MPCA gates
64 KByte memory:
- 30 512x32 dual-port memory,
- 2 512x32 single-port memory
153-pin programmable IOs
Connections for 4 AHB Masters, 8 AHB slave, and 6 APB
slaves
Other Peripherals:
Power Management
5 I2C Cores
SSP
2 UARTs
RTC, Timer, Watchdog Timer, Interrupt Controller
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Price and
Availability
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PeripheralComposer |
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Target Technology |
0.18um |
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Typical Packaging |
308, 388 and 484-pin |
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MPCA
Usable Gates |
250K |
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Available SRAM |
60 KByte Dual Port
4 KByte
Single Port |
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NRE |
$144K |
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Price @ 10,000 Units |
$13 |
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Availability |
Now |
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Turn-around Time |
25 Days |
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About
Faraday
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Faraday Technology Corporation is a leading
silicon IP and fabless ASIC vendor. The
company's broad IP portfolio includes 32-bit
RISC CPUs, DSPs, PHY/Controllers for USB 2.0,
Ethernet, Serial ATA and PCI-Express. With more
than 530 employees and 2004 revenue of $159
million, Faraday is one of the largest fabless
ASIC companies in the Asia-Pacific region, and
it also has a significant presence in other
markets, world-wide. Headquartered in Taiwan ,
Faraday has service and support offices around
the world, including the U.S., Japan, Europe,
and China. For more information, please visit:
http://www.faraday-tech.com
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