CDNLive Taiwan 2017

Welcome to join our seminar at CDNLive!

Date August 17, 2017 (Thu) 3:45pm–4:15pm
Venue Ambassador Hotel - Ballroom B-10F
No. 188, Section 2, Zhonghua Rd, Hsinchu City, Taiwan
Registration CDNLive Website

Session Track 5–IC Packaging and PCB Design
Subject: USB 3.0 IBIS-AMI Generation Using Sigrity SystemSI AMI Builder
Speaker: Frane Jian, Senior Engineer, Faraday Technology
Description:
The traditional IBIS model is widely used SI simulation in PCB because its simulation speed is 2 or 3 order faster than circuit level simulator. For modern multi-giga rate SERDES, the IBIS model is insufficient to meet multi-giga rate SERDES because these IP contain numbers of arithmetic algorithm blocks, for example, the pre-emphasis, de-emphasis, CRC, AGC, etc. The IBIS-AMI model is proposed by IBIS community that wants to solve the insufficiency of traditional IBIS model. The IBIS-AMI model is an executable object code that can be executed by simulator. From the IBIS-AMI document, the compiled object codes are written in C/C++ language. It is very difficult for RD’s due to their background.

In the past years, the IBIS-AMI was needed to co-work with professional SI service company to build up IBIS-AMI model if he wanted to release his IBIS-AMI model. SystemSI is an easy tool to generate IBIS-AMI model in block level design without C/C++ programming and also provides channel simulation features. In this paper, we use our USB 3.x IP as the try run case and use SystemSi to construct our IBIS-AMI generation and channel simulation flow to speed up RD’s design process.