Design Entry & Review

The process of this stage is to implement the evaluation of data-in specifications by analyzing its timing, area, power, complexity inside, and all correlation factors affecting the robust of the IC designs; furthermore, it estimates the time leading to the design completion.

 

 

 

 

Design Entry and Review
Design Stage Major Task Design Kit/EDA Tool
Design entry and review
Schematic entry
Cadence Composer
 
Behavioral simulation
Cadence NC-Sim
Mentor Graphics ModelSim
Synopsys VCS
 
Power estimation
Faraday powersheet
 
Chip size estimation
Faraday fsize
 
Low power design spec. review
Faraday fcpfgen