Design Implementation

The process of this stage is dedicated to creating a unique design environment identical to customers. Entering to the coding process, your design will be identified constraints and take the necessary logic and physical synthesis downstream.

 

 

Legend Description:
The light-colored block:design implementation stage
The dark-colored block:design verification stage

 

Design Implementation
Design Stage Major Task Design Kit/EDA Tool
Design Implementation
Logic synthesis
Synopsys Design Compiler
Cadence RTL Compiler
Incentia DesignCraft
  DFT synthesis/ATPG

Faraday ftip/fiolt/fmbist/fscan/fbsd/fatpg
Synopsys DFT Compiler/BSD Compiler
Incentia TestCraft
MentorGraphics Tessent
MBIST/TestKompress/FastScan

  Physical implementation Cadence Encounter EDI
Synopsys IC Compiler
ATopTech Aprisa
  Clock tree synthesis Cadence CTS/CCOpt
Synopsys IC Compiler
ATopTech Aprisa
  Noise-aware synthesis Faraday  ppg
Cadence SOC-Encounter
Synopsys IC Compiler
ATopTech Aprisa