Faraday's FA5 series processors, FA526 and FA510, are both 32-bit general purpose RISC microprocessors designed especially for SoC. The cores are based on the ARMv4™ instruction set and AMBA™ 2.0 AHB bus architecture. The FA5 series is fully compliant with ARM CPU cores and has been stringently certified by ARM. This enables FA5 users to utilize the full range of development tools designed for the ARM cores. FA526 is generally integrated in application-based platforms which use sophisticated operating systems (OS's), while FA510 is commonly implemented in embedded real-time systems which use simple OS's or non-OS's.

The FA5's high performance and low power features are suitable for mobile, and handheld applications as well as many other embedded products.

FA5 Series RISC Processor Family

Core Process
(µm)		 I/D Cache Size*1 (KB) WC Freq.
(Mhz)
Typical Power
(mW/MHz)		 Area
(mm2)
Availability (GDS)
GDSII Test Chip
FA510 0.25 4/4 100 2.7 5.39 Now  
0.18 GII 0/0 120 0.5 1.69 Now  
4/4 160 1.4 3.6 Now Now
4/4 200 1.1 2.75 Now  
0.18 LL 8/8 100 N/A 3.92 Now  
FA526 0.18 GII 8/4 166 1.14 5.3 Now  
8/8 192 1.06 5.6 Now  
16/16*2 195 1.06 6.6 Now Now
0.13 HS 8/8 300 0.38 3.32 Now Now
16/8 300 0.38 3.35 Now  


Note:
1. The I-Cache and D-Cache Support the external I-Scratchpad and D-Scratchpad, details described in the     specified hard core.
2. FA 526' s I-Cache and D-Cache include internal 8K I-Scratchpad/8K D-Scratchpad.
3. Speed frequency is based on the worst case condition.
4. Power consumption is based on the typical case condition.
5. All data are subject to change without notice.

 

FA5 Series RISC Processor Key Features

  • ARMv4™ 32-bit instruction set
  • 6-stage pipeline
  • AMBA™ 2.0 system bus interface
  • Branch prediction with Branch Target Buffer (BTB) : 2-bit counter
  • 1.26 Dhrystones MIPS/MHz.
  • Bi-endian support
  • Power saving mode
  • ARM tool chain support
  • MPU support (FA510), MMU support (FA526)
  • Memory sub-system
    • Harvard architecture, non-blocking data cache subsystem
    • Configurable I/D-Cache sizes
    • Configurable I/D-Scratchpad sizes
    • 2-way set associate cache
    • Write through/back
    • Cache lockdown

FA5 Series RISC Processors Advantages

  • Highest performance and least power consumption
  • ARM-compliant CPU certified by ARM
  • Professional SoC technical support
  • Flexible customization
  • Both cores support configurable cache sizes. FA526 supports external I/D-Caches, especially for extensive customization requirements.
  • Abundant in-house peripheral IPs
  • Market-proven SoCreative development platform support for integration and evaluation

FA5 Series RISC Processors Accessories

  • Tool Chain (OS, Compiler/Assembler/Linker, ICE)

    FA526 supports Linux kernels 2.6 and 2.4. The OS has been proven by the Linux Test Project test suite to guarantee the quality and completeness.

    The FA526 core supports the ARM ADS v1.2), RVDS v 2.2.1 ) and GNU tool chains for Linux OS. The ARM tool chains support the non-OS environment as well.

    Currently FA626 supports ARM Multi-ICE, AIJI OPENICE-A1000, Lauterbach TRACE32 ICD and EPI MAJIC. Support of the ARM RealView ICE will be available soon.

    FA510 supports uCLinux 2.4 kernel. The FA510 core supports ARM ADS v1.2, RVDS v2.2.1 and GNU tool chains under this OS, as well as the non-OS environment. FA510 supports Multi-ICE and Faraday ICE . The latter can further decrease the cost of development since its debugging tool was developed by Faraday.

  • SoCreative SoC Development Platform  

    system environment where CPU, companion chips, peripherals and customer application logic can be integrated and tested. Currently, the development board package includes a motherboard, an USB2.0 ICE parser, and the associated BSP (board support package).

    An add-on function extension board (optional) is available. Customers can port their designs in the FPGA logic module, and mount it on the SoCreative SoC development board via the AHB bus to evaluate and integrate

  • Software Driver Suites
    The Software Driver Suites are based on the Faraday OS support to reduce development efforts and shorten time-to-market. Faraday also provides the Device Driver Suites of the entire A320 development platform, such as INTC, Timer, RTC, SDMC, SMC (ROM/Flash/SRAM), UART, LCD, PCI, MAC, SPI, SSP, I 2 S, I 2 C , USB 1.1 Device/Host, KBD/Mouse, CFC, MMC/SD, Memory Stick, IrDA, AC97, and USB 2.0 Device, etc.