FPGA-Optimized SoC Prototyping Platform
At Faraday we recognize the importance of early ROI and fast time to market for our systems and fabless customers. As such, we have recently introduced the “FPGACompanion” (FC) family - a series of standalone devices that connect seamlessly via an ARM AHB bus directly to FPGAs, facilitating rapid development of FPGA prototype boards.
Faraday's first FPGACompanion™ product, FPGACompanion-1 (FC-1), is a highly integrated silicon-proven SoC that integrates a 190 MHz ARM™v4 compatible CPU and peripherals, and an AHB bus transaction bridge enabling direct connectivity to external FPGA devices. The FC-1 allows FPGA system designers to gain access to a high-performance AHB connection between the CPU and the FPGA, while benefiting from all available peripherals including 10/100 Ethernet, 2x USB 2.0 OTG/Device, UART, I2C , SDRAM/SMC and SPI/I2S on the chip for system prototyping. FC-1 addresses a common problem for many system companies that generally start with an x86 ™-, PowerPC™- or MIPS™-based FPGA design and are forced to convert to an ARM™ SoC that entails considerable software porting effort and risk. The FC-1 provides an appropriate solution from the start by providing architects with a compelling ARM SoC that can enable easy prototyping, while offering a smooth migration to an architecturally compatible structured ASIC for total BOM, power dissipation and board area reduction, without software complications.
FPGACompanion-1 to Structured ASIC Migration
The “FC-1 + FPGA” approach enables designs to not only fully test a complete prototyping model but also empower companies to offer the prototyping system for resale in low volume production quantities, leading to early revenue generation. Faraday's “FC-1 + FPGA” prototyping approach reduces the time from specification to hardware/software co-verification, enabling software design teams with a real- world hardware prototyping platform for debug and test, as opposed to using traditional hardware & software co-simulation models or hardware emulation methodologies that are often very slow.
FC-1 is packaged in 484-pin PBGA using 0.18 µm technology and dissipates less than 1 watt.
FPGACompanion-1 Block Diagram
Features
- 0.18 µm UMC Process, 1P6M
- 1.8V (Core), 3.3V (I/O)
- 190 MHz FA526 CPU w/ Linux BSP
- 32-bit ARMv4 compatible
- Memory Management Unit
- 16K I-Cache/16K D-Cache
- AHB I/F for FPGA connectivity
- Static Memory Controller supports SRAM, Flash and ROM (NOR FLASH)
- SDRAM controller
- Network connectivity
- 10/100 Ethernet MAC
- Integrated AD/DA
- AES-DES encryption engine
- 2x USB 2.0 w/PHY (OTG/DVC)
- CPU peripherals
- 1x UART with auto-flow-control function for RS485
- 1x 16550 compatible UART
- AC97/I2S/SSP/SPI/MicroWire
- 5-channel I2C controller
- 3-channel internal timer
- Real-Time Clock (RTC)
- WatchDog Timer
- 32-ch Interrupt Controller
- DMA controller
- 32 GPIO pins
- Package: 484-pin PBGA (23 x 23mm2)
- Power: 1 watt (max.)
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Benefits
- Rapid FPGA-based prototyping using standard AHB connectivity
- Easy migration to structured ASIC without software complications
- Low BOM to enable prototype shipments
- Enables use of lower costs Xilinx/Altera FPGA devices
- Complete solution kit including EVB and Linux driver software
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Software Development Environment and Drivers
- Compiler/Assembler/Linker : ARM ADS, GNU for ARM
- Operating System: Linux 2.6.14
- ICE: ARM RealView ICE, ARM Multi-ICE, Faraday ICE, Lauterbach Trace32 ICD, EPI MAJIC
- Peripheral Drivers: INTC, Timer, RTC, SDMC, SMC (ROM/Flash/SRAM), UART, MAC, SPI, SSP, I2S, I2C, Device/Host, AC97, USB 2.0 OTG, USB Device
FC Evaluation Board (EVB)
Detail information
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