Clock

Updated On:2018-01-24
Gradation
Faraday IPs are rated according to the IPs’ maturity and customer acceptance. They are graded by the rules described as below,


Platinum P Five (5) productions verified
Gold G Mass production proven
Silver S Silicon proven, Formal release
Silver Minus S- Manufacturing onging
Bronze B Pre-Silicon release
 
Analog > Clock
> All Digital Delay Line > 20M ~ 500M, All Digital Delay Line 
Cell Name Descriptions Type Process Gradation Literature
FXDCDL201HH0L Input 50M-210MHz, output 50M-210MHz. An all digital slave delay line of FXADDLL200HH0L to generate Programmable delay per 1/32 UI delay line UMC 40nm LP Logic Process Analog_IP 40nm Bronze
 
Analog > Clock
> All Digital Delay Line > 500M ~ 1G, All Digital Delay Line 
Cell Name Descriptions Type Process Gradation Literature
FXDCDL331HH0L Input 360M-720MHz, output 360M-720MHz, all digital slave delay line of FXADDLL330HH0L to generate programmable delay in period of FREF,UMC 40nm LP Process Analog_IP 40nm Bronze
FXDCDL351HH0L Input 360M-720MHz, output 360M-720MHz, all digital slave delay line of FXADDLL330HH0L to generate programmable delay in period of FREF, UMC 40nm LP Process Analog_IP 40nm Bronze
 
Analog > Clock
> All Digital Delay Line > over 1G, All Digital Delay Line 
Cell Name Descriptions Type Process Gradation Literature
FXDCDL341HH0L Input 800M-1600MHz, output 800M-1600MHz, all digital slave delay line of FXADDLL340HJ0G to generate 100% delay in period of FREF,UMC 40nm Logic Process Analog_IP 40nm Bronze
FXDCDL341HJ0C Input 333M-1600MHz, output 333M-1600MHz, all digital slave delay line of FXADDLL340HJ0C to generate 100% delay in period of FREF,UMC 28nm Logic and Mixed-Mode HPC Process Analog_IP 28nm Contact Sales
FXDCDL341HJ0G Input 800M-1600MHz, output 800M-1600MHz, all digital slave delay line of FXADDLL340HJ0G to generate 100% delay in period of FREF,UMC 28nm Logic and Mixed-Mode HPM Process Analog_IP 28nm Bronze
FXDCDL342HH0L Input 800M-1600MHz, output 800M-1600MHz, all digital slave delay line of FXADDLL340HJ0G to generate 100% delay in period of FREF,UMC 40nm Logic Process . Analog_IP 40nm Bronze
FXDCDL342HJ0C Input 333M-1600MHz, output 333M-1600MHz, all digital slave delay line of FXADDLL340HJ0C to generate 50% delay in period of FREF,UMC 28nm Logic and Mixed-Mode HPC Process Analog_IP 28nm Contact Sales
FXDCDL342HJ0G Input 800M-1600MHz, output 800M-1600MHz, all digital slave delay line of FXADDLL340HJ0G to generate 50% delay in period of FREF,UMC 28nm Logic and Mixed-Mode HPM Process Analog_IP 28nm Bronze
FXDCDL343HH0L Input 800M-1600MHz, output 800M-1600MHz, all digital slave delay line of FXADDLL340HJ0G to generate 100% delay in period of FREF,UMC 40nm Logic Process Analog_IP 40nm Bronze
FXDCDL343HJ0C Input 333M-1600MHz, output 333M-1600MHz, all digital slave delay line of FXADDLL340HJ0C to generate 25% delay in period of FREF,UMC 28nm Logic and Mixed-Mode HPC Process Analog_IP 28nm Contact Sales
FXDCDL343HJ0G Input 800M-1600MHz, output 800M-1600MHz, all digital slave delay line of FXADDLL340HJ0G to generate 25% delay in period of FREF,UMC 28nm Logic and Mixed-Mode HPM Process Analog_IP 28nm Bronze
FXDCDL344HH0L Input 400M-1600MHz, output 400M-1600MHz, all digital slave delay line of FXADDLL340HH0L to generate 25% delay in period of FREF, UMC 40nm LP/RVT Logic Process. Analog_IP 40nm Bronze
 
Analog > Clock
> DDR DLL > 20M ~ 500M, DDR DLL 
Cell Name Descriptions Type Process Gradation Literature
FXDLL011HC0H Input 66M-133M Hz, output 66M-133M Hz, DDR DLL; UMC 0.13um Logic HS (FSG) process Analog_IP 0.13um Silver
FXDLL011HD0A Input 66M-200M Hz, output 66M-200M Hz, DDR DLL; UMC 90nm SP/RVT Low-K Logic Process. Analog_IP 90nm Gold
FXDLL300HC0H UMC 0.13um HS/FSG Process DLL-based cell that generates four-channel DQS with 13.5% ~ 36.6% timing delay for DDR1 SDRAM controller usage. Analog_IP 0.13um Silver
FXDLL300HR0B DLL-based cell that generates four-channel DQS with 13.5% ~ 36.6% timing delay for DDR1 SDRAM controller usage ;UMC 0.11um HS/AE (AL Advanced Enhancement) Logic Process Analog_IP 0.11um Silver
FXDLL310HD0A Input 200-333MHz, output 200-333MHz, DDR2 DLL; UMC 90nm SP/RVT Low-K logic process Analog_IP 90nm Bronze
FXDLL310HE0A Input 100-400MHz, output 100-400MHz, DDR2 DLL; UMC 65nm SP/RVT LowK Logic Process Analog_IP 65nm Silver Minus
FXDLL310HF0A Input 200-400MHz, output 200-400MHz, DDR2 DLL; UMC 55nm SP Low-K Logic Process Analog_IP 55nm Silver
FXDLL311HA0A Input 100M-200M Hz, output 100M-200M Hz, DDR DLL; 0.18um Logic GII process Analog_IP 0.18um Gold
FXDLL311HB0G Input 100M-200M Hz, output 100M-200M Hz, DDR DLL; 0.15um SP Logic process Analog_IP 0.15um Silver
FXDLL311HC0H Input 100M-200M Hz, output 100M-200M Hz, DDR DLL; 0.13um Logic HS (FSG) process Analog_IP 0.13um Platinum
FXDLL311HP0A Input 100M-200M Hz, output 100M-200M Hz, DDR DLL; UMC 0.162um Logic Process Analog_IP 0.162um Silver
 
FXDLL340HA0A Input 100M-150M Hz, output 100M-150M Hz, DDR DLL; 0.18um Logic GII process Analog_IP 0.18um Gold
FXDLL340HF0A Input 80-320MHz, output 6.25%~50% delay,80-320MHz, DDR2 DLL; UMC 55nm SP/RVT LowK Logic Process Analog_IP 55nm Silver
FXDLL350HC0H It is a 0.13?m HS DLL-based cell that generates three-channel DQS with 13.5% ~ 36.6% timing delay for DDR2 SDRAM controller usage. Analog_IP 0.13um Silver
FXDLL380HC0H DLL-based cell that generates two-channel DQS with 25% timing delay for DDR2 SDRAM controller usage ; UMC 0.13um HS/FSG Process Analog_IP 0.13um Bronze
FXDLL380HR0B DLL-based cell that generates two-channel DQS with 25% timing delay for DDR2 SDRAM controller usage ; UMC 0.11um HS/AE (AL Advanced Enhancement) Logic Process Analog_IP 0.11um Bronze
FXDLL380HR0H DLL-based cell that generates two-channel DQS with 25% timing delay for DDR2 SDRAM controller usage ; UMC 0.11um HS/RVT Logic Process Analog_IP 0.11um Bronze
 
Analog > Clock
> DDR DLL > 500M ~ 1G, DDR DLL 
Cell Name Descriptions Type Process Gradation Literature
FXDLL340HD0A Input 333M-667M Hz, output 333M-667M Hz, DDR2/3 Multi-phase DLL; UMC 90nm SP/RVT LowK Logic Process Analog_IP 90nm Silver
 
Analog > Clock
> DLL > 20M ~ 500M, DLL 
Cell Name Descriptions Type Process Gradation Literature
FXDLL200HR0B 1.2V 50-200MHz DLL with programmable phase delay; UMC 0.11um HS/AE (AL Enhancement) Logic Process Analog_IP 0.11um Silver
FXDLL208HR0B DLL-based cell that generates 32 phase delay for FTSDC021; UMC 0.11um HS/AE (AL Advanced Enhancement) Logic Process Analog_IP 0.11um Bronze
FXDLL330HR0H Input 100M~400MHz, Output 100M~400MHz DLL-based cell that generates two-channel DQS with 25% timing delay ; UMC 0.11um HS/RVT Logic Process Analog_IP 0.11um Bronze
FXDLL340HF0L UMC 55nm LP/RVT Low-K logic process, Operating frequency 80MHz-320MHz, DQS delay 6.25%-50%. Analog_IP 55nm Silver Minus
FXDLL340HH0L Input 80MHz-280MHz, DQS delay 6.25%-50% of FREF period, UMC 40nm LP/RVT Low-K logic process. Analog_IP 40nm Silver Minus
FXDLL340HJ0C DLL-based cell that generates 32 phase delay for SDIO; Frequency range: 52MHz~208MHz; UMC 28nm HPC Logic Process Analog_IP 28nm Contact Sales
FXDLL341HF0A Input 80MHz-280MHz, DQS delay 3.125%-50% of FREF period, UMC 55nm SP/RVT Low-K logic process. Analog_IP 55nm Silver Minus
FXDLL341HR0B 1.2V 50-202.5MHz DLL with programable phase delay; UMC 0.11um HS/AE (AL Enhancement) Logic Process Analog_IP 0.11um Contact Sales
 
FXDLL344HH0L Input 80MHz-440MHz, DQS delay 1/32 and 1/16 of FREF period, UMC 40nm LP/RVT Low-K logic process. Analog_IP 40nm Bronze
FXDLL360HD0A Input 18M-45M Hz, output 18M-45M Hz, timing generator DLL; UMC 90nm SP/RVT Lowk process Analog_IP 90nm Silver Minus
FXDLL365HD0A Input 5M-35M Hz, output 5M-35M Hz, timing generator DLL; UMC 90nm SP process Analog_IP 90nm Silver Minus
 
Analog > Clock
> Digitized DLL > 20M ~ 500M, Digitalized DLL 
Cell Name Descriptions Type Process Gradation Literature
FXADDLL200HH0L An ADDLL operate at 50MHz~210MHz. Supports slave delay line to generate per 1/32 UI programmable delay UMC 40nm LP/RVT Logic Process. Analog_IP 40nm Bronze
FXADDLL310HJ0L Input 333M-800MHz, output 333M-800MHz, all digital DLL with one-channel DQS delay range ; UMC 28nm HLP Process Analog_IP 28nm Contact Sales
 
Analog > Clock
> Digitized DLL > 500M ~ 1G, Digitalized DLL 
Cell Name Descriptions Type Process Gradation Literature
FXADDLL310HD0A Input 333M-800MHz, output 333M-800MHz, all digital DLL with one-channel DQS delay range ;UMC 90nm SP/RVT LowK Logic Process Analog_IP 90nm Bronze
FXADDLL310HE0A Input 333M-800MHz, output 333M-800MHz, all digital DLL with one-channel DQS delay range ; UMC 65nm SP/RVT LowK Logic Process Analog_IP 65nm Bronze
FXADDLL310HE0L Input 200M-533MHz, output 200M-533MHz, all digital DLL with two-channel DQS delay range ; UMC 65nm LP/RVT LowK Logic Process. Analog_IP 65nm Bronze
 
FXADDLL310HF0A Input 333M-800MHz, output 333M-800MHz, all digital DLL with one-channel DQS delay range ; UMC 55nm SP/RVT LowK Logic Process Analog_IP 55nm Bronze
FXADDLL310HF0L Input 333M-800MHz, output 333M-800MHz, all digital DLL with one-channel DQS delay range ; UMC 55nm LP/RVT LowK Logic Process Analog_IP 55nm Silver Minus
 
FXADDLL310HH0L Input 333M-800MHz, output 333M-800MHz, all digital DLL with one-channel DQS delay range ; UMC 40nm LP/RVT LowK Logic Process Analog_IP 40nm Silver Minus
FXADDLL323HE0L Input 333M-800MHz, output 333M-800MHz, all digital DLL with one-channel DQS delay range ; UMC 65nm LP/RVT LowK Logic Process Analog_IP 65nm Bronze
FXADDLL330HH0L An ADDLL operate at 300MHz~600MHz. Output 0-180 degree Phase adjustment range. Delay adjustment resolution <= 1% of reference clock UMC 40nm LP/RVT Logic Process. Analog_IP 40nm Silver
FXADDLL340HF0A Input 333M-800MHz, output 333M-800MHz, all digital DLL with per 1/64UI programmable delay ; UMC 55nm SP/RVT Low-K Logic Process Analog_IP 55nm Silver
FXADDLL350HH0L Input 360M-720M Hz, output 360M-720M Hz, DLL;Output 0-180 degree Phase adjustment range. UMC 40nm LP process. Analog_IP 40nm Bronze
 
Analog > Clock
> Digitized DLL > over 1G, Digitalized DLL 
Cell Name Descriptions Type Process Gradation Literature
FXADDLL340HH0L Input 800M-1600MHz, output 800M-1600MHz, all digital DLL for DDR4 SDRAM controller usage, supports slave delay line to generate 25%/50%/100% delay in period of FREF,UMC 40nm Logic Process. Analog_IP 40nm Bronze
FXADDLL340HJ0C Input 333M-1600MHz, output 333M-1600MHz, all digital DLL for DDR4 SDRAM controller usage, supports slave delay line to generate 25%/50%/100% delay in period of FREF,UMC 28nm Logic and Mixed-Mode HPC Process. Analog_IP 28nm Contact Sales
FXADDLL340HJ0G Input 800M-1600MHz, output 800M-1600MHz, all digital DLL for DDR4 SDRAM controller usage, supports slave delay line to generate 25%/50%/100% delay in period of FREF,UMC 28nm Logic and Mixed-Mode HPM Process Analog_IP 28nm Silver Minus
 
Analog > Clock
> LC-PLL > 20M ~ 500M, LC-PLL 
Cell Name Descriptions Type Process Gradation Literature
FXLCPLL101HH0L Jitter clean integer-N LC-PLL for serdes, output frequency is 156.25M, input frequency is 25M for Low-Jitter Mode, 156.25M for Jitter-Clean Mode. UMC 40nm LP LowK Logic Process. Analog_IP 40nm Contact Sales
 
FXLCPLL101HJ0C Jitter clean integer-N LC-PLL for serdes, output frequency is 156.25M, input frequency 156.25M for Jitter-Clean Mode. UMC 28nm HPC Process. Analog_IP 28nm Contact Sales
FXLCPLL101HJ0P Jitter clean integer-N LC-PLL for serdes, output frequency is 156.25M, input frequency 156.25M for Jitter-Clean Mode. UMC 28nm HPC+ Process. Analog_IP 28nm Contact Sales
 
 
Analog > Clock
> MiniPLL > 20M ~ 500M, MiniPLL 
Cell Name Descriptions Type Process Gradation Literature
FXPLL130HE0A Input 20M-200M Hz, output 250M-500M Hz, frequency synthesizable PLL; UMC 65nm Logic SP/RVT process Analog_IP 65nm Silver
 
Analog > Clock
> Oscillator 
Cell Name Descriptions Type Process Gradation Literature
FXLCOSC012HH0L XTAL LESS for USB3.0 ; UMC 40nm LP/RVT Logic Process Analog_IP 40nm Bronze
FXOSC001HR0F Internal-RC, trimmable fixed frequency 1MHz. Input 1.14V-1.26V VBG=0.8V; UMC 0.11um EFLASH Logic Process Analog_IP 0.11um Bronze
FXOSC002HH0L Internal-RC, frequency 1.8432MHz or 2.4576MHz, Input 1.045V-1.155V, VBG=0.8V Oscillator. UMC 40nm LP/RVT Logic Process. Analog_IP 40nm Silver Minus
FXOSC003HF0L Self-contained ring oscillator, frequency 32KHz. VCC11A=1.08V~1.32V; UMC 55nm LP/RVT Low-K Logic process Analog_IP 55nm Bronze
 
FXOSC003HF0U NO External-R ,frequency 32.768KHz , Oscillator . Input 0.9V+/-10%; UMC 55nm ULP process. Analog_IP 55nm Silver Minus
FXOSC005HF0A Output frequency 10KHz. Input 0.9V-1.1V,Oscillator ; UMC 55nm SP/RVT LowK Logic Process Analog_IP 55nm Contact Sales
 
FXOSC008HF0F Internal-R, frequency 48MHz/8MHz. Input 1.08V-1.32V; UMC 55nm EFLASH process Analog_IP 55nm Bronze
FXOSC008HF0L Internal-RC, frequency 8MHz. Input 1.08V-1.32V ; UMC 55nm LP/RVT LowK Logic Process Analog_IP 55nm Silver Minus
 
FXOSC008HF0U Internal-RC, frequency 8.192M. Input 0.81V-1.32V; UMC 55nm Ultra Low Power process. Analog_IP 55nm Contact Sales
 
FXOSC008HR0B Self-contained ring oscillator, frequency 8kHz. VCC12A=1.08V~1.32V; UMC 0.11um HS/AE Logic process. Analog_IP 0.11um Silver
FXOSC010HD0K Internal-RC, trimmable fixed frequency 10MHz. Input 1.08V-1.32V VBG=0.5V; UMC 90nm Logic LL/RVT Low-K process Analog_IP 90nm Bronze
FXOSC010HP0A Internal-RC, frequency 10MHz. Input 1.62V-1.98V VBG=0.615V Oscillator; UMC 0.162um GII Logic Process Analog_IP 0.162um Silver
FXOSC020HC0H 4M~15MHz R-C Oscillator with External R;UMC 0.13um Logic HS (FSG) process. Analog_IP 0.13um Silver
FXOSC025HE0L Internal-RC, frequency selected 25 MHz/33MHz. Input 1.08V-1.32V VBG=0.4V; UMC 65nm LP/RVT LowK Logic Process Analog_IP 65nm Silver
FXOSC030HC0H 15M~50MHz R-C Oscillator with External R;UMC 0.13um Logic HS (FSG) process. Analog_IP 0.13um Silver
FXOSC032HF0G internal-R, frequency 32.768MHz RC OSC. Input 0.9V±10% or 1.2V±10% ; UMC 55 nm EFLASH process Analog_IP 55nm Silver Minus
FXOSC032HF0L Crystal oscillator, frequency 32.768kHz, input 1.62~3.6V, UMC 55nm LP/RVT LowK Logic Process Analog_IP 55nm Contact Sales
 
FXOSC032HF0U NO External-R ,frequency 32.768MHz , Oscillator . Input 0.9V+/-10% ,1.2V+/-10% ; UMC 55nm ULP process. Analog_IP 55nm Silver Minus
FXOSC032HH0L Internal-R,output frequency 32 KHz, Input 0.99V-1.21V Oscillator. UMC 40nm LP/RVT Logic Process. Analog_IP 40nm Silver
FXOSC040HA0A Internal-RC, trimmable frequency 20MHz, VCCA=1.6V~2.0V VBG=0.615V; UMC 0.18um Logic GII process Analog_IP 0.18um Bronze
FXOSC040HC0H Internal-RC, trimmable fixed frequency 40MHz. Input 1.08V-1.5V VBG=0.615V; UMC 0.13um Logic HS (FSG) process Analog_IP 0.13um Silver
FXOSC040HF0A Internal RC, output 40MHz with +/-5% frequency accuracy OSC, UMC 55nm SP/RVT Low-K logic Process Analog_IP 55nm Bronze
FXOSC045HA0A Internal-RC, frequency 40MHz. Input 1.6V-2.0V VBG=0.615V; UMC 0.18um Logic GII process Analog_IP 0.18um Gold
FXOSC045HF0F NO External-R ,frequency 30K~60K ,RC Oscillator . Power:2.0V~3.6V; UMC 55nm EFLASH process. Analog_IP 55nm Bronze
FXOSC045HF0L NO External-R ,frequency 30K~60K ,RC Oscillator . Power:2.0V~3.6V; UMC 55nm LP process. Analog_IP 55nm Silver Minus
FXOSC045HP0A Internal-RC, frequency 40MHz. Input 1.6V-2.0V VBG=0.615V; UMC 0.162um GII Logic Process Analog_IP 0.162um Silver
 
FXOSC048HF0U Internal-R, frequency 48MHz/32MHz/16MHz/8MHz, Input 1.08V-1.32V; UMC 55nm Low K Ultra low power process Analog_IP 55nm Contact Sales
 
FXOSC048HH0L InternalRC OSC, optional outout frequency 48MHz/24MHz/16MHz/12MHz, input VBG=0.8V; UMC 40nm LP/RVT Logic Process Analog_IP 40nm Silver Minus
FXOSC050H90A Internal-RC, trimmable frequency 30MHz, VCCA=2.0V~3.0V VBG=1.23V; UMC 0.25um Logic process Analog_IP 0.25um Gold
FXOSC050HA0A Internal-RC,trimmable frequency selected 25 KHz/33MHz,VCCA=1.2V~1.8V,VBG=0.615; UMC 0.18um Logic GII process Analog_IP 0.18um Gold
FXOSC050HA0F UMC 0.18um eFlash Process, Internal-RC,trimmable frequency selected 25MHz/33MHz,VCCA=1.2V~1.8V,VBG=0.615 Analog_IP 0.18um Silver
FXOSC050HD0A Internal-RC, trimmable fixed frequency 50MHz. Input 0.9V-1.1V VBG=0.6V; UMC 90nm Logic SP/RVT Low-K process Analog_IP 90nm Silver
FXOSC050HE0A Internal-RC, trimmable fixed frequency 50MHz, Input 0.9V-1.1V, VBG=0.5V; UMC 65nm Logic SP/RVT Low-K process Analog_IP 65nm Bronze
FXOSC050HR0H Internal-RC, trimmable fixed frequency 50MHz. Input 1.14V-1.26V VBG=0.8V; UMC 0.11um HS/FSG Logic Process Analog_IP 0.11um Silver
FXOSC054HH0L Internal RC OSC, optional outout frequency 54MHz/27MHz/18MHz/13.5MHz, input VBG=0.8V; UMC 40nm LP/RVT Logic Process Analog_IP 40nm Bronze
FXOSC055HA0A Internal-RC, frequency 50MHz. Input 1.62V-1.98V VBG=0.615V; UMC 0.18um Logic GII process Analog_IP 0.18um Silver
FXOSC055HP0A Internal-RC, frequency 50MHz. Input 1.62V-1.98V VBG=0.615V ; UMC 0.162um GII Logic process Analog_IP 0.162um Bronze
FXOSC055HP0U Internal-RC, frequency 50MHz. Input 2.97V-3.63V VBG=0.615V ; UMC 0.162um EHV 3.3V/8.25V/16.5V Process Analog_IP 0.162um Silver Minus
FXOSC060H80A 27.5MHz trimmable R-C Oscillator;UMC 0.35um logic process. Analog_IP 0.35um Silver
FXOSC060H90A External-C, frequency 30KHz~300KHz, VCCA=2.0V~3.0V; UMC 0.25um Logic process Analog_IP 0.25um Silver
FXOSC060HA0A sub-low current 12KHz RC-Oscillator; UMC 0.18um Logic GII process Analog_IP 0.18um Silver
FXOSC060HC0H Self-contained ring oscillator, frequency 32KHz. VCC12A=1.08V~1.32V; UMC 0.13um Logic HS process. Analog_IP 0.13um Gold
FXOSC060HD0A 12kHz Ring OSC Analog_IP 90nm Silver Minus
FXOSC060HE0A Internal-RC, trimmable fixed frequency 12KHz. Input 0.9V-1.1V; UMC 65nm Logic SP/RVT Low-K process Analog_IP 65nm Bronze
FXOSC060HE0K Internal-RC, trimmable fixed frequency 12KHz. Input 1.08V-1.32V; UMC 65nm Logic LL/RVT Low-K process Analog_IP 65nm Bronze
FXOSC060HF0A Output frequency 32KHz. Input 0.9V-1.1V; UMC 55nm SP/RVT LowK Logic Process Analog_IP 55nm Contact Sales
 
FXOSC060HR0F Self-contained ring oscillator, frequency 32kHz. VCC12A=1.08V~1.32V; UMC 0.11um EFLASH Logic process. Analog_IP 0.11um Silver
FXOSC064HC0H Internal-R,output frequency 64KHz, Input 1.08V-1.32V,Oscillator; UMC 0.13um logic HS FSG process Analog_IP 0.13um Silver
FXOSC070HC0H Self-contained ring oscillator, frequency 12KHz. VCC12A=1.08V~1.32V; UMC 0.13um Logic HS process. Analog_IP 0.13um Silver
FXOSC071HA0A Internal-RC, trimmable frequency selected 50MHz/70MHz. Input 1.62V-1.98V VBG=0.615V; UMC 0.18um Logic GII process Analog_IP 0.18um Silver Minus
FXOSC071HC0H Internal-RC, trimmable fixed frequency 70MHz. Input 1.08V-1.32V VBG=0.8V; UMC 0.13um Logic HS/FSG process Analog_IP 0.13um Silver
FXOSC071HR0H Internal-RC, trimmable fixed frequency 70MHz. Input 1.08V-1.32V VBG=0.8V; UMC 0.11um HS/FSG Logic Process Analog_IP 0.11um Silver
FXOSC080HA0A Internal-RC, trimmable frequency 80MHz. Input 1.62V-1.98V, VBG=0.615V; UMC 0.18um Logic GII process Analog_IP 0.18um Bronze
FXOSC212HR0B Internal-RC and Built-in Bandgap, trimmable fixed frequency 12MHz. Input 1.14V-1.26V; UMC 0.11um HS/AE (AL Advanced Enhancement) Logic Process Analog_IP 0.11um Contact Sales
 
FXOSC271HR0B Internal-R, trimmable fixed frequency 70MHz. Input 1.08V-1.32V; UMC 0.11um HS/AE (AL Advanced Enhancement) Logic Process Analog_IP 0.11um Silver
FXOSC272HR0H Internal-RC, trimmable fixed frequency 70MHz Power Supply: 1.14V-1.26V; UMC 0.11um HS/FSG Logic Process Analog_IP 0.11um Silver
FXOSC348HF0U Internal-R, frequency 48KHz. Input 1.14v-3.63v; UMC 55nm ULP process Analog_IP 55nm Contact Sales
 
FXOSC372HR0B Internal-RC, trimmable fixed frequency 70MHz & 82.5MHz. Power Supply: 3V-3.6V; UMC 0.11um HS/AE (AL Advanced Enhancement) Logic Process Analog_IP 0.11um Silver Minus
FXOSC380HR0B Internal-RC, trimmable fixed frequency 80MHz. Power Supply: 3V-3.6V; UMC 0.11um HS/AE (AL Advanced Enhancement) Logic Process Analog_IP 0.11um Contact Sales
 
OSC040H90A External-R, frequency 15MHz~50MHz. VCCA=2.0V~3.0V VBG=1.23V Analog_IP 0.25um Gold
OSC070H80A Sub-low current with external-C, frequency 10KHz, VCCA=2.0V~3.3V, Ivcca<10uA. Analog_IP 0.35um Silver
 
Analog > Clock
> Others 
Cell Name Descriptions Type Process Gradation Literature
FXCKTREE110NSHJ0C 200MHz, clock tree for CMC project; UMC 28nm HPC Analog_IP 28nm Contact Sales
 
FXS2D101HH0L IP name: FXS2D101HH0L Area: 300um*300um Analog_IP 40nm Silver
 
Analog > Clock
> PLL > 20M ~ 500M, Generic PLL 
Cell Name Descriptions Type Process Gradation Literature
FXPLL004HF0L Input 2MHz~16MHz, output 16~72MHz and 72MHz~200MHz, 1.08~1.32V PLL; UMC 55nm Low Power Process. Analog_IP 55nm Silver Minus
FXPLL010HA0L_APGD Input 1M-200M Hz, output 12.5M-200M Hz, frequency synthesizable PLL with power/ground pad; 0.18um Logic LL process Analog_IP 0.18um Silver
FXPLL010HB0G Input 5M-200M Hz, output 20M-300M Hz, frequency synthesizable PLL; 0.15um SP Logic process Analog_IP 0.15um Silver
FXPLL010HB0G_APGD Input 5M-200M Hz, output 20M-300M Hz, frequency synthesizable PLL with power/ground pad; 0.15um SP Logic process Analog_IP 0.15um Silver
FXPLL010HC0G Input 10M-200M Hz, output 25M-400M Hz, frequency synthesizable PLL; 0.13um Logic SP (FSG) process Analog_IP 0.13um Silver
FXPLL010HC0G_APGD Output frequency 25M~400MHz PLL;0.13um Logic SP (FSG) process Analog_IP 0.13um Silver
FXPLL010HC0H Input 5M-200M Hz, output 25M-400M Hz, frequency synthesizable PLL; 0.13um Logic HS (FSG) process Analog_IP 0.13um Platinum
FXPLL010HC0I Input 1M-200M Hz, output 12M-300MHz, frequency synthesizable PLL; UMC 0.13um CMOS image sensor process Analog_IP 0.13um Contact Sales
 
FXPLL010HC0L Input 5M-200M Hz, output 12.5M-200M Hz, frequency synthesizable PLL; 0.13um Logic LL (FSG) process Analog_IP 0.13um Gold
FXPLL010HC0L_APGD Input 5M-200M Hz, output 12.5M-200M Hz, frequency synthesizable PLL with power/ground pad; UMC 0.13um Logic LL (FSG) process Analog_IP 0.13um Silver
FXPLL010HC0S Input 2M-200M Hz, output 12M-300MHz, frequency synthesizable PLL; UMC 0.13um CMOS image sensor process Analog_IP 0.13um Contact Sales
 
FXPLL010HC0U Input 5M-100M Hz, output 20M-400M Hz, frequency synthesizable PLL; 0.13um Logic Fusion (FSG) process Analog_IP 0.13um Silver
FXPLL010HC0U_APGD Input 5M-100M Hz, output 20M-400M Hz, frequency synthesizable PLL with power/ground pad; 0.13um Logic Fusion (FSG) process Analog_IP 0.13um Silver
FXPLL010HF0A Input 10M-310M Hz, output 20M-310M Hz, frequency synthesizable PLL; UMC 55nm SP/RVT Process Analog_IP 55nm Contact Sales
 
FXPLL010HF0L Input 10M-200M Hz, output 20M-300M Hz, frequency synthesizable PLL; UMC 55nm LP/RVT Low-K Logic Process Analog_IP 55nm Silver
FXPLL010HH0L Input 10-50M Hz, output 10-200M Hz, frequency synthesizable PLL; UMC 40nm LP/RVT Logic Process Analog_IP 40nm Silver
FXPLL010HH0L_FTC Input 10-50M Hz, output 10-200M Hz, frequency synthesizable PLL; UMC 40nm LP/RVT Logic Process(Note:same schematic with FXPLL010HH0L, but Poly Density Errors are waived in layout for 40% area reduced.) Analog_IP 40nm Bronze
FXPLL010HR0B Input 10MHz~200MHz, output 25MHz~400MHz, frequency synthesizable PLL; UMC 0.11um LOGIC/MIXEDMODE AE Process Analog_IP 0.11um Silver
FXPLL010HR0F Input 10-200MHz, output 25-400MHz, frequency synthesizable PLL; UMC 0.11um EFLASH logic process Analog_IP 0.11um Silver
FXPLL010HR0G Input 10MHz~200MHz, output 25MHz~400MHz, frequency synthesizable PLL; UMC 0.11um SP/FSG Logic Process Analog_IP 0.11um Silver
FXPLL010HR0I Input 5M-200M Hz, output 12.5M-300M Hz, frequency synthesizable PLL; UMC 0.11um CIS process Analog_IP 0.11um (0.13um Shrink) Silver
FXPLL010HR0I_APGD Input 5M-200M Hz, output 12.5M-300M Hz, frequency synthesizable PLL with power/ground pad; UMC 0.11um CIS process Analog_IP 0.11um (0.13um Shrink) Silver
FXPLL011HA0L Input 5M-200M Hz, output 12.5M-200M Hz, frequency synthesizable PLL; 0.18um Logic LL process Analog_IP 0.18um Silver
FXPLL011HR0B Input 10-200MHz, output 25-400MHz, frequency synthesizable PLL; UMC 0.11um HS/AE Logic Process; It has lock detector function Analog_IP 0.11um Silver
FXPLL015HC0H Input 80M-150M Hz, output 80M-150M Hz, frequency synthesizable PLL; UMC 0.13um Logic EHS(FSG) process Analog_IP 0.13um Silver
FXPLL019HC0H Input 372M ~ 540MHz, output 5M ~ 400MHz, PLL; UMC 0.13um HS/FSG Logic Process Analog_IP 0.13um Silver
 
FXPLL019HR0B Input 372M ~ 540MHz, output 5M ~ 197MHz, PLL; UMC 0.11um HS/AE (AL Advanced Enhancement) Logic Process Analog_IP 0.11um Contact Sales
 
FXPLL019HR0H Input 372M ~ 540MHz, output 5M ~ 420MHz, PLL; UMC 0.11um HS/FSG Logic Process Analog_IP 0.11um Silver
 
FXPLL020HA0A Input 4M-200M Hz, output 20M-400M Hz, frequency synthesizable PLL; 0.18um Logic GII process Analog_IP 0.18um Gold
FXPLL020HR0B Input 10MHz~200MHz, output 25MHz~400MHz, frequency synthesizable PLL; UMC 0.11um LOGIC/MIXEDMODE AE Process Analog_IP 0.11um Silver Minus
FXPLL030HR0B The PLL is design with UMC 0.11um AE process, with input frequency from 8MHz to 100MHz,and output frequency from 60MHz to 480MHz according to the user setting. UMC 0.11um AE process. Analog_IP 0.11um Silver
FXPLL031HA0A_APGD Input 5M-300M Hz, output 20M-300M Hz, frequency synthesizable PLL with power/ground pad; 0.18um Logic GII process Analog_IP 0.18um Platinum
FXPLL031HA0F_APGD Input 5M-300M Hz, output 20M-300M Hz, frequency synthesizable PLL with power/ground pad; UMC 0.18um eFLASH process Analog_IP 0.18um Silver
FXPLL031HA0L UMC 0.18um LL process Input 5M-300M Hz, output 20M-300M Hz, frequency synthesizable PLL Analog_IP 0.18um Silver
FXPLL031HD0A Input 5M-300M Hz, output 20M-300M Hz, frequency synthesizable PLL ; UMC 90nm SP/RVT Low-K Logic Process Analog_IP 90nm Gold
FXPLL031HD0K Input 5M-300M Hz, output 20M-300M Hz, frequency synthesizable PLL; UMC 90nm LL-RVT 1P9M process Analog_IP 90nm Silver
FXPLL031HE0A Input 5M-500M Hz, output 31.25M-500M Hz, frequency synthesizable PLL; UMC 65nm SP-RVT 1P9M process Analog_IP 65nm Silver
FXPLL031HE0K Input 5M-300M Hz, output 20M-300M Hz, frequency synthesizable PLL; UMC 65nm LL-RVT 1P10M process Analog_IP 65nm Silver
FXPLL031HP0A Input 5M-300M Hz, output 20M-300M Hz, frequency synthesizable PLL ; UMC 0.162um Logic Process Analog_IP 0.162um Silver
FXPLL032HC0H Input 20M-200M Hz, output 50M-100M Hz, frequency synthesizable PLL; UMC 0.13um Logic HS process Analog_IP 0.13um Bronze
FXPLL033HE0K Input 5M-300M Hz, output 20M-300M Hz, frequency synthesizable PLL; UMC 65nm Logic LL/RVT Low-k process Analog_IP 65nm Bronze
FXPLL045HR0H_APGD Input 45k-60k Hz, output 81M- 132M Hz, PLL; UMC 0.11um HS/FSG Logic Process Analog_IP 0.11um Silver
FXPLL050HA0A Input 5M-200M Hz, output 60M-200M Hz, frequency synthesizable PLL; 0.18um Logic GII process Analog_IP 0.18um Silver
FXPLL060HA0A Input 20M-200M Hz, output 20M-300M Hz, frequency synthesizable PLL; 0.18um Logic GII process Analog_IP 0.18um Platinum
FXPLL060HA0F Input 20M-200M Hz, output 20M-300M Hz, frequency synthesizable PLL; UMC 0.18um 1P6M eFlash Process Analog_IP 0.18um Silver
FXPLL060HD0K Input 20M-200M Hz, output 20M-300M Hz, frequency synthesizable PLL; UMC 90nm LL/RVT Low-K Logic Process Analog_IP 90nm Bronze
FXPLL060HF0A Input 20M-200M Hz, output 20M-300M Hz, frequency synthesizable PLL; UMC 55nm SP/RVT Low-K Logic Process Analog_IP 55nm Silver
FXPLL061HA0A Input 10M-200M Hz, output 20M-300M Hz, frequency synthesizable PLL; 0.18um Logic GII process Analog_IP 0.18um Platinum
FXPLL068HR0B_FTC Input 12M Hz, output 96M~180M Hz, 1.08~1.32V frequency synthesizable PLL; UMC 0.11um HS/AE (AL Advance Enhancement) Logic Process Analog_IP 0.11um Silver Minus
 
FXPLL070HA0A Input 20M-200M Hz, output 20M-300M Hz, frequency synthesizable PLL; UMC 0.18um Logic GII proces. Analog_IP 0.18um Silver
FXPLL071HA0A Input 10M-200M Hz, output 20M-300M Hz, frequency synthesizable PLL; UMC 0.18um GII Logic process Analog_IP 0.18um Silver
FXPLL110HD0A This Phase-Locked Loop (PLL) based clock multiplier can generate a stable, high-speed clock from a slower external clock signal. 5/9 bit programmable dividers Analog_IP 90nm Silver
FXPLL125HH0L Input 12M Hz, output clock1 540M Hz and output clock2 120M Hz, PLL; UMC 40nm LP/RVT Low-K Logic Process Analog_IP 40nm Silver Minus
FXPLL130HC0H The FXPLL130HC0H is a phase locked loop with an operating range of 250M~500MHz; UMC 0.13um Logic HS(FSG) process Analog_IP 0.13um Silver
FXPLL130HR0B Input 20M-200M Hz, output 250M-500M Hz, frequency synthesizable PLL; UMC 0.11um HS/AE (AL Advanced Enhancement) Logic Process Analog_IP 0.11um Silver
FXPLL131HC0H Input 20M-200M Hz, output 250M-500M Hz, frequency synthesizable PLL; UMC 0.13um Logic HS process Analog_IP 0.13um Silver
FXPLL132HC0H Input 20M-200M Hz, output 250M-500M Hz, frequency synthesizable PLL; UMC 0.13um Logic HS process Analog_IP 0.13um Silver
FXPLL134HC0H Input 12M-200M Hz, output 250M-500M Hz, frequency synthesizable PLL; UMC 0.13um Logic HS process Analog_IP 0.13um Platinum
FXPLL134HD0A Input 12M-200M Hz, output 250M-500M Hz, frequency synthesizable PLL; UMC 90nm Logic SP process Analog_IP 90nm Gold
FXPLL134HE0A miniPLL (TM) Phase-Locked Loop (PLL) with an operating frequency range of between 31.5 MHz and 500 MHz ; UMC 65nm SP/RVT LowK Logic Process Analog_IP 65nm Silver Minus
 
FXPLL134HH0L miniPLL (TM) Phase-Locked Loop (PLL) with an operating frequency range of between 250 MHz and 500 MHz ; UMC 40nm LP/RVT Logic Process Analog_IP 40nm Bronze
FXPLL135HD0A Input 25/50MHz, output 400MHz, frequency synthesizable PLL; UMC 90nm SP/RVT Low-K Process Analog_IP 90nm Silver
FXPLL168HC0H Input 20M-200M Hz, output 250M-500M Hz (with duty ratio 40%~60%) and 125M~ 250MHz (with duty ratio 45%~ 55%), frequency synthesizable PLL; UMC 0.13um HS/FSG Logic process Analog_IP 0.13um Bronze
FXPLL180HC0H High speed clock generator using UMC 0.13um 1.2V HS process. Analog_IP 0.13um Silver
FXPLL181HC0H UMC 0.13um HS/FSG Process PLL for DDR2. Clock input 25-27MHz, clock output 1050-1070MHz Analog_IP 0.13um Gold
FXPLL327HD0A Input 32.768K Hz, output 12M-30M Hz, PLL; UMC 90nm Logic SP/RVT Low-k Process Analog_IP 90nm Silver Minus
 
FXPLL327HF0L Input 32.768KHz, Output 12 and 48MHz PLL; UMC 55nm LP/RVT Logic Process Analog_IP 55nm Silver
FXPLL327HL0A Input 32.768K Hz, output 12MHz, PLL; UMC 0.153um Logic GII/MM Process Analog_IP 0.153um Silver
 
FXPLL327HR0B Input 32.768KHz, Ouput 12 and 24MHz PLL, UMC 0.11um HS/AE (AL Advanced Enhancement) Logic Process Analog_IP 0.11um Contact Sales
 
FXPLL327HR0H Input 32.768K Hz, output 12M-48M Hz, PLL; UMC 0.11um HS/Copper Logic Process. Analog_IP 0.11um Silver Minus
 
FXPLL360HH0L_LTE2 Input 25M~440MHz, output 267M-533M, 200M-400M and 160M-320M, frequency synthesizable PLL; UMC 40nm LP/RVT Logic Process Analog_IP 40nm Contact Sales
 
FXPLL362HC0H Input 133MHz - 266MHz, output clock_1X 133MHz - 266MHz, output clock_2X 266MHz - 533MHz, output clock_4X 533MHz-1066MHz,frequency synthesizable PLL; UMC 0.13um HS/FSG Logic Process Analog_IP 0.13um Silver
FXPLL362HF0L Input 200MHz - 400MHz, output clock_1X 200MHz - 400MHz, output clock_2X 400MHz - 800MHz, output clock_4X 800MHz-1600MHz,frequency synthesizable PLL;UMC 55nm LP/RVT LowK Logic process Analog_IP 55nm Silver Minus
FXPLL362HH0L Input 200MHz - 400MHz, output clock_1X 200MHz - 400MHz, output clock_2X 400MHz - 800MHz, output clock_4X 800MHz-1600MHz,frequency synthesizable PLL;UMC 40nm LP/RVT LowK Logic process Analog_IP 40nm Silver Minus
FXPLL363HE0L Input 200MHz - 400MHz, output clock_1X 200MHz - 400MHz, output clock_2X 400MHz - 800MHz, output clock_4X 800MHz-1600MHz,frequency synthesizable PLL;UMC 65nm LP/RVT LowK Logic process Analog_IP 65nm Bronze
FXPLL831HD0A Input 5M-100M Hz, output 20M-300M Hz, fractional-N frequency synthesizable PLL; UMC 90nm Logic SP/RVT LowK Process Analog_IP 90nm Silver
FXPLLG011HF0L Input 10M-200M Hz, output 20M-400M Hz, frequency synthesizable PLL; UMC 55nm LP/RVT Low-K Logic Process Analog_IP 55nm Contact Sales
 
FXPLLG020HA0A Input 1M-200M Hz, output 25M-380M Hz, frequency synthesizable PLL; 0.18um Logic GII process Analog_IP 0.18um Platinum
FXPLLG031HD0K Input 5MHz-300MHz, output 50MHz-300M Hz, frequency synthesizable PLL; UMC 90nm LL-RVT 1P9M process Analog_IP 90nm Silver
FXPLLG031HE0A Input 10M-500MHz, Output 31.25M-500MHz, frequency synthesizer PLL, UMC 65nm SP/RVT Low-K Process Analog_IP 65nm Silver
FXPLLHV362HJ0G Half low pass filter area compare with FXPLL362HJ0G, Input 200MHz - 800MHz, output clock_1X 200MHz - 800MHz, output clock_2X 400MHz - 1600MHz, output,frequency synthesizable PLL;UMC 28nm HPM Logic Process Analog_IP 28nm Contact Sales
 
FXPLLJ010HA0A Input 5M-200M Hz, output 10M-200M Hz, frequency synthesizable low voltage PLL; 0.18um Logic GII process Analog_IP 0.18um Silver
FXPLLJ011HC0H Input 15M-110M Hz, output 15M-110M Hz, De-skew PLL with 0.9V~1.32V power supply range; UMC 0.13um Logic HS(FSG) process Analog_IP 0.13um Silver Minus
 
FXPLLLV362HJ0G This version has only one power domain and smaller PLL area than FXPLL362HJ0G, Input 200MHz - 800MHz, output clock_1X 200MHz - 800MHz, output clock_2X 400MHz - 1600MHz, output,frequency synthesizable PLL;UMC 28nm HPM Logic Process Analog_IP 28nm Contact Sales
 
PLL030HA0A Input 1M-300M Hz, output 20M-300M Hz, frequency synthesizable PLL; 0.18um Logic GII process Analog_IP 0.18um Platinum
PLL031HA0A Input 5M-300M Hz, output 20M-300M Hz, frequency synthesizable PLL; 0.18um Logic GII process Analog_IP 0.18um Platinum
PLL9019 Input 5M-100M Hz, output 20M-300M Hz, frequency synthesizable PLL; 0.25um Logic process Analog_IP 0.25um Gold
 
Analog > Clock
> PLL > 500M ~ 1G, Generic PLL 
Cell Name Descriptions Type Process Gradation Literature
FXPLL030HE0K Input 1M-5M Hz, output 15M-600M Hz, frequency synthesizable PLL; UMC 65nm LL-RVT Low-K process Analog_IP 65nm Silver Minus
FXPLL032HD0A Input 10M-200M Hz, output 300M-600M Hz, frequency synthesizable PLL ; UMC 90nm SP/RVT Low-K Logic Process Analog_IP 90nm Gold
FXPLL032HD0K Input 20M-200M Hz, output 300M-600M Hz, frequency synthesizable PLL ; UMC 90nm Low Leakage (RVT) Low-K Process Analog_IP 90nm Silver
FXPLL032HE0K Input 20M-200M Hz, output 300M-600M Hz, frequency synthesizable PLL; UMC 65nm Logic LL-RVT Low-K 1P10M process Analog_IP 65nm Silver
FXPLL032HF0A Input 10M-200M Hz, output 300M-600M Hz, frequency synthesizable PLL ; UMC 55nm SP Low-K Logic Process Analog_IP 55nm Silver
FXPLL032HR0B Input 6M-180MHz, output 165M-660MHz, frequency synthesizable PLL; UMC 0.11um HS/AE (AL Advanced Enhancement) Logic Process Analog_IP 0.11um Bronze
FXPLL033HF0A Input 20M-50M Hz, output 300M-600M Hz, frequency synthesizable PLL; UMC 55nm SP/RVT process Analog_IP 55nm Silver Minus
FXPLL062HD0A Input 156.25 MHz, output 625 MHz, frequency synthesizable PLL; UMC 90nm SP/RVT LowK Logic Process. Analog_IP 90nm Silver Minus
FXPLL080HE0A Input 25-33.33 MHz, output 600 MHz/800 MHz, 400 MHz/533 MHz, 200 MHz/266 MHz frequency synthesizable PLL; UMC 65nm SP/RVT Low-K Logic Process Analog_IP 65nm Silver Minus
FXPLL350HC0H Input 66.66M Hz, output 400M-800M Hz, frequency synthesizable PLL; UMC 0.13um HS/FSG Logic process Analog_IP 0.13um Silver
 
FXPLL350HD0A Input 66M-100M Hz, output 400M-800M Hz, frequency synthesizable PLL; UMC 90nm Logic SP process Analog_IP 90nm Silver Minus
FXPLL350HF0A Input 33.33M-100M Hz, output 400M-800M Hz, frequency synthesizable PLL; UMC 55nm SP-RVT Low-K process Analog_IP 55nm Silver
FXPLL360HE0L Input 25M-66M Hz, output 400M-800M Hz, frequency synthesizable PLL; UMC 65nm LP/RVT LowK Logic Process Analog_IP 65nm Bronze
FXPLL360HF0F Input 20M-66M Hz, output 400M-800M Hz, frequency synthesizable PLL; UMC 55nm EFLASH RVT LowK Logic Process Analog_IP 55nm Silver Minus
FXPLL360HF0G Input 20M-66M Hz, output 400M-800M Hz, frequency synthesizable PLL; UMC 55nm EFLASH/EE2PROM ULP RVT LowK Logic Process Analog_IP 55nm Silver Minus
FXPLL360HF0L Input 25M-66M Hz, output 400M-800M Hz, frequency synthesizable PLL; UMC 55nm LP/RVT LowK Logic Process Analog_IP 55nm Silver
FXPLL360HH0L Input 25M-66M Hz, output 400M-800M Hz, frequency synthesizable PLL; UMC 40nm LP/RVT Logic Process Analog_IP 40nm Silver
FXPLL360HJ0G Input 25-66M Hz, output 400-800M Hz, frequency synthesizable PLL; UMC 28nm HPM Logic Process Analog_IP 28nm Silver Minus
FXPLL510HH0L_DPHY Input 6M-27M Hz, output 10M-850M Hz, frequency synthesizable PLL; UMC 40nm Logic LP RVT and LVT process Analog_IP 40nm Silver
FXPLL512HJ0C_DPHY Input 12M Hz, output 40M-850M Hz, frequency synthesizable PLL; UMC 28nm HPC Logic Process Analog_IP 28nm Bronze
FXPLL610HF0F Input 2MHz~16MHz, output 16~1000MHz, 1.08~1.32V small-size PLL; UMC 55nm Eflash Process. Analog_IP 55nm Bronze
FXPLLLV362HH0L This IP for DDR4, Input 200MHz - 800MHz, output clock_1X 200MHz - 800MHz, output clock_2X 400MHz - 1600MHz, output,frequency synthesizable PLL; UMC 40nm LP Logic Process Analog_IP 40nm Contact Sales
 
Analog > Clock
> PLL > over 1G, Generic PLL 
Cell Name Descriptions Type Process Gradation Literature
FXPLL080HF0A Input 12MHz, output 800 MHz/1000MHz, 533 MHz/666 MHz, 400 MHz/500 MHz, 266 MHz/533 MHz, frequency synthesizable PLL; UMC 55nm SP/RVT LowK Logic Process Analog_IP 55nm Silver
FXPLL080HF0A_MTD Input 12MHz, output 900 MHz/1200MHz, 600 MHz/800 MHz, 360 MHz/480MHz, 300 MHz/400MHz, frequency synthesizable PLL; UMC 55nm SP/RVT LowK Logic Process Analog_IP 55nm Contact Sales
 
FXPLL110HC0H Input 5M-100M Hz, output 62.5M-1000M Hz, frequency synthesizable PLL; 0.13um Logic HS (FSG) process Analog_IP 0.13um Platinum
FXPLL110HC0H_APGD Input 5M-100M Hz, output 62.5M-1000M Hz, frequency synthesizable PLL with power/ground pad; 0.13um Logic HS (FSG) process Analog_IP 0.13um Platinum
FXPLL110HH0L Input 10M-200M Hz, output 62.5M-1G Hz, frequency synthesizable PLL; UMC 40 nm LP/RVT Low-K Logic Process Analog_IP 40nm Silver
FXPLL110HJ0C Input 10M-50M Hz, output 25M-1.3G Hz, frequency synthesizable PLL; UMC 28nm HPC Process Analog_IP 28nm Contact Sales
FXPLL110HJ0G Input 20M-200M Hz, output 62.5M-1G Hz, frequency synthesizable PLL; UMC 28nm Logic and Mixed-Mode HPM Process Analog_IP 28nm Contact Sales
 
FXPLL110HJ0L Input 20M-200M Hz, output 62.5M-1G Hz, frequency synthesizable PLL; UMC 28nm Logic and Mixed-Mode HLP Process Analog_IP 28nm Contact Sales
 
FXPLL120HC0H Input 20M-200M Hz, output 500M-1000M Hz, frequency synthesizable PLL; 0.13um Logic HS (FSG) process Analog_IP 0.13um Platinum
FXPLL120HD0A Input 20M-36M Hz, output 500M-1000M Hz, frequency synthesizable PLL; UMC 90nm Logic SP RVT-LowK Process. Analog_IP 90nm Silver
FXPLL120HE0A Input 20M-200M Hz, output 500M-1000M Hz, frequency synthesizable PLL; UMC 65nm Logic SP/RVT process Analog_IP 65nm Silver
FXPLL120HH0L Input 20M-200M Hz, output 500M-1G Hz, frequency synthesizable PLL; UMC 40nm LP/RVT LowK Logic Process Analog_IP 40nm Silver
FXPLL120HR0B Input 20M-200M Hz, output 500M-1000M Hz, frequency synthesizable PLL; UMC 0.11um HS/AE (AL Advanced Enhancement) Logic Process Analog_IP 0.11um Platinum
FXPLL120HR0H Input 20M-200M Hz, output 500M-1000M Hz, frequency synthesizable PLL; UMC 0.11um HS/FSG Logic Process Analog_IP 0.11um Silver
FXPLL122HC0H Input 20M-200M Hz, output 500M-1000M Hz, frequency synthesizable PLL; UMC 0.13um Logic HS process Analog_IP 0.13um Silver
FXPLL150HD0A Input 25M-200M Hz, output 1000M-1500M Hz, frequency synthesizable PLL; UMC 90nm SP/RVT Low-K Logic Process. Analog_IP 90nm Gold
 
FXPLL150HE0A Input 25M-500M Hz, output 1000M-1500M Hz, frequency synthesizable PLL; UMC 65nm SP-RVT 1P9M process Analog_IP 65nm Silver
FXPLL150HE0K Input 20M-200M Hz, output 1000M-1500M Hz, frequency synthesizable PLL; UMC 65nm LL-RVT Low-K process Analog_IP 65nm Bronze
FXPLL150HF0A Input 33M-300M Hz, output 1000M-1500M Hz, frequency synthesizable PLL; UMC 55nm SP-RVT Low-K process Analog_IP 55nm Silver
FXPLL160HD0A Input 33MHz/66MHz, output 1056MHz, frequency synthesizable PLL; UMC 90nm SP/RVT Low-K Logic Process. Analog_IP 90nm Silver
FXPLL225HJ0G Input 25M-50M Hz, output 1000M-2000MHz, frequency synthesizable PLL; UMC 28nm Logic and Mixed-Mode HPM Process Analog_IP 28nm Contact Sales
 
FXPLL357HJ0C Input 6~27MHz, output 160~3000MHz frequency synthesizable PLL; UMC 28HPC process Analog_IP 28nm Bronze
FXPLL360HD0A Input 25M-50M Hz, output 667M-1300M Hz, frequency synthesizable PLL; UMC 90nm SP/RVT LowK Logic Process Analog_IP 90nm Silver
FXPLL362HD0A Input 200M-400M Hz, output 800M-1600M 400-800MHz and 200-400MHz , frequency synthesizable PLL; UMC 90nm SP/RVT LowK Logic Process Analog_IP 90nm Silver
FXPLL362HF0A Input 200M-400M Hz, output 800M-1600M,400-800MHz and 200-400MHz , frequency synthesizable PLL; UMC 55nm SP/RVT LowK Logic Process Analog_IP 55nm Silver Minus
FXPLL362HJ0C Input 200MHz~400MHz, output 200MHz~1600MHz frequency synthesizable PLL; UMC 28nm HPC Logic Process Analog_IP 28nm Contact Sales
FXPLL530HJ0C Input 6~27MHz, Output 62.5~2000MHz PLL, UMC 28nm HPC process. Analog_IP 28nm Contact Sales
 
Analog > Clock
> SSCG > 20M ~ 500M, SSCG 
Cell Name Descriptions Type Process Gradation Literature
FXSSD010HA0A UMC 0.18um GII process 20MHz-70MHz delay-type spread-spectrum clock generator. Analog_IP 0.18um Silver
 
Analog > Clock
> SSCG > 500M ~ 1G, SSCG 
Cell Name Descriptions Type Process Gradation Literature
FXSSCG360HH0L Input clock:25~66MHz, output clock range:400 ~ 800 MHz wide-range SSCG; UMC 40nm LP/RVT process. Analog_IP 40nm Silver
FXSSCG360HJ0C Input 25~66MHz, output 200~800MHz wide range SSCG PLL, UMC 28nm HPC/RVT process. Analog_IP 28nm Bronze
 
Analog > Clock
> SSCG > over 1G, Digitalized SSCG 
Cell Name Descriptions Type Process Gradation Literature
FXSSCG601HR0B 5GHz SSCG with 25MHz reference clock; UMC 0.11um HS/AE (AL Advanced Enhancement) 1P8M2T Logic Process Analog_IP 0.11um Silver Minus
FXSSCG601HR0Q 5GHz SSCG with 25MHz reference clock; UMC 0.11um HS/AE (AL Advanced Enhancement) 1P8M2T Logic Process Analog_IP 0.11um Bronze
FXSSCG602HR0B Input clock range:10 ~ 1280 MHz, output clock range:15.625 ~ 2000 MHz wide-range SSCG; UMC 0.11um HS/AE (AL Advanced Enhancement) 1P8M2T Logic Process Analog_IP 0.11um Silver
 
Analog > Clock
> SSCG > over 1G, Generic PLL 
Cell Name Descriptions Type Process Gradation Literature
FXSSCG220HR0H 5GHz SSCG with 25MHz reference clock ; UMC 0.11um 1P6M20T HS/FSG Logic Process Analog_IP 0.11um Silver
 
Analog > Clock
> SSCG > over 1G, SSCG 
Cell Name Descriptions Type Process Gradation Literature
FXSSCG602HF0A Input clock range:5 ~ 1280 MHz, output clock range:15.625 ~ 2000 MHz wide-range SSCG; UMC 55nm SP process. Analog_IP 55nm Silver
FXSSCG602HF0L Input clock range:5 ~ 1280 MHz, output clock range:15.625 ~ 2000 MHz wide-range SSCG; UMC 55nm LP process. Analog_IP 55nm Silver
FXSSCG602HH0L Input clock range:5 ~ 1280 MHz, output clock range:15.625 ~ 2000 MHz wide-range SSCG; UMC UMC 40nm LP/LVT LowK Logic Process Analog_IP 40nm Silver
FXSSCG603HH0L Input clock:8MHz, output clock range:720 ~ 1680 MHz wide-range SSCG; UMC 40nm LP process. Analog_IP 40nm Silver