Updated On:2018-01-21
Faraday IPs are rated according to the IPs’ maturity and customer acceptance. They are graded by the rules described as below,

Platinum P Five (5) productions verified
Gold G Mass production proven
Silver S Silicon proven, Formal release
Silver Minus S- Manufacturing onging
Bronze B Pre-Silicon release
Interface Solution > DDR
> DDR PHY - Command/Address > DDR3 PHY - Command/Address 
Cell Name Descriptions Type Process Gradation Literature
IO Command/Address Block of DDR3/DDR3L/DDR2/LPDDR2/LPDDR ; UMC 28nm HPC/RVT Logic Process Analog_IP 28nm Contact Sales
FXDDR4AFC602HH0L Command/Address Block of DDR3/DDR4/LPDDR2/LPDDR3 Combo PHY for Solder bump Flip chip version ; UMC 40nm LP LowK Logic Process Analog_IP 40nm Contact Sales