Structured ASIC Library

Updated On:2018-06-23
Gradation
Faraday IPs are rated according to the IPs’ maturity and customer acceptance. They are graded by the rules described as below,


Platinum P Five (5) productions verified
Gold G Mass production proven
Silver S Silicon proven, Formal release
Silver Minus S- Manufacturing onging
Bronze B Pre-Silicon release
 
Logic Libraries > Structured ASIC Library
> Metal Programmable Cell Array > MPCA Core Library 
Cell Name Descriptions Type Process Gradation Literature
FE90A_E_GENERIC_CORE UMC 0.25um Logic process mask programmable cell array with body E core cell Library Library_Group 0.25um Gold
FE90A_S_GENERIC_CORE UMC 0.25um Logic process shrink (0.22um) mask programmable cell array with body A core cell Library Library_Group 0.25um Bronze
FEA0A_E_GENERIC_CORE UMC 0.18um Logic GII process mask programmable cell array with body E core cell Library Library_Group 0.18um Platinum
FEA0L_E_GENERIC_CORE UMC 0.18um Logic LL process mask programmable cell array with body E core cell Library Library_Group 0.18um Silver
FEC0H_E_GENERIC_CORE UMC 0.13um Logic HS (FSG) process mask programmable cell array with body E core cell Library Library_Group 0.13um Silver
FEC0H_J_M345_CORE UMC 0.13um Logic HS (FSG) process metal programmable (M3/M4/M5) cell array standard core cell Library. Library_Group 0.13um Silver
FEC0L_E_GENERIC_CORE UMC 0.13um Logic LL (FSG) process mask programmable cell array with body E core cell Library Library_Group 0.13um Silver
FEE0A_ERM_V1M234_COR
E
UMC 65nm SP/RVT Logic Process MPCA cell library Library_Group 65nm Bronze
FER0H_D_V1M234_CORE UMC 0.11um HS/FSG Logic Process high density MPCA core cell library with minimum Via1 to M4 programming Library_Group 0.11um Bronze