PowerSlash Core Cell Library

Updated On:2018-04-23
Gradation
Faraday IPs are rated according to the IPs’ maturity and customer acceptance. They are graded by the rules described as below,


Platinum P Five (5) productions verified
Gold G Mass production proven
Silver S Silicon proven, Formal release
Silver Minus S- Manufacturing onging
Bronze B Pre-Silicon release
 
Logic Libraries > PowerSlash Core Cell Library
> 12-Track 
Cell Name Descriptions Type Process Gradation Literature
FSJ0C_HHS_POWERSLASH
_CORE
UMC 28nm HPC/HVT Logic and Mixed-Mode Process 12-track POWERSLASH cell library enhanced for routing (C35) Library_Group 28nm Contact Sales
 
FSJ0C_HLS_POWERSLASH
_CORE
UMC 28nm HPC/LVT Logic and Mixed-Mode Process 12-track POWERSLASH cell library enhanced for routing (C35) Library_Group 28nm Bronze
FSJ0C_HRS_POWERSLASH
_CORE
UMC 28nm HPC/RVT Logic and Mixed-Mode Process 12-track POWERSLASH cell library enhanced for routing (C35) Library_Group 28nm Contact Sales
 
 
Logic Libraries > PowerSlash Core Cell Library
> 12-Track > 12T HVT PSK Library 
Cell Name Descriptions Type Process Gradation Literature
FSJ0C_GHS_POWERSLASH
_CORE
UMC 28nm HPC/HVT Logic and Mixed-Mode Process 12-track PowerSlash cell library (C35) Library_Group 28nm Bronze
FSJ0L_GHS_POWERSLASH
_CORE
UMC 28nm Logic and Mixed-Mode HLP/HVT Process 12-track PowerSlash Cell library (C35) Library_Group 28nm Silver
 
Logic Libraries > PowerSlash Core Cell Library
> 12-Track > 12T LVT PSK Library 
Cell Name Descriptions Type Process Gradation Literature
FSJ0C_GLS_POWERSLASH
_CORE
UMC 28nm HPC/LVT Logic and Mixed-Mode Process 12-track PowerSlash cell library (C35) Library_Group 28nm Bronze
FSJ0L_GLS_POWERSLASH
_CORE
UMC 28nm Logic and Mixed-Mode HLP/LVT Process 12-track PowerSlash cell library (C35) Library_Group 28nm Silver
 
Logic Libraries > PowerSlash Core Cell Library
> 12-Track > 12T RVT PSK Library 
Cell Name Descriptions Type Process Gradation Literature
FSJ0C_GRS_POWERSLASH
_CORE
UMC 28nm HPC/RVT Logic and Mixed-Mode Process 12-track PowerSlash cell library (C35) Library_Group 28nm Bronze
 
FSJ0L_GRS_POWERSLASH
_CORE
UMC 28nm Logic and Mixed-Mode HLP/RVT Process 12-track Standard POWERSLASH core cell library (C35) Library_Group 28nm Silver
 
Logic Libraries > PowerSlash Core Cell Library
> 7-Track > 7T HVT PSK Library 
Cell Name Descriptions Type Process Gradation Literature
FSJ0C_DHS_POWERSLASH
_CORE
UMC 28nm HPC/HVT Logic and Mixed-Mode Process 7-track PowerSlash Kit cell library C35 Library_Group 28nm Silver
FSJ0C_EHS_POWERSLASH
_CORE
UMC 28nm HPC/HVT Logic and Mixed-Mode Process 7-track POWERSLASH cell library enhanced for routing (C35) Library_Group 28nm Silver
FSJ0L_EHS_POWERSLASH
_CORE
UMC 28nm HLP/HVT Logic and Mixed-Mode Process 7-track PowerSlash Cell Library Library_Group 28nm Silver
FSJ0L_EHU_POWERSLASH
_CORE
UMC 28nm HLP/HVT Logic and Mixed-Mode Process 7-track Generic Core Cell Library with LPLUS (C-38) Library_Group 28nm Contact Sales
 
FSJ0P_EHS_POWERSLASH
_CORE
UMC 28nm HPC+/HVT Logic and Mixed-Mode Process 7-track POWERSLASH cell library enhanced for routing (C35) Library_Group 28nm Contact Sales
 
Logic Libraries > PowerSlash Core Cell Library
> 7-Track > 7T LVT PSK Library 
Cell Name Descriptions Type Process Gradation Literature
FSJ0C_DLS_POWERSLASH
_CORE
UMC 28nm HPC/LVT Logic and Mixed-Mode Process 7-Track POWERSLASH cell library (C35) Library_Group 28nm Silver
FSJ0C_ELS_POWERSLASH
_CORE
UMC 28nm HPC/LVT Logic and Mixed-Mode Process 7-track POWERSLASH cell library enhanced for routing (C35) Library_Group 28nm Silver
FSJ0L_ELD_POWERSLASH
_CORE
UMC 28nm HLP/LVT Logic and Mixed-Mode Process 7-track Powerslash Cell Library with LMINUS (C-30) Library_Group 28nm Contact Sales
 
FSJ0L_ELS_POWERSLASH
_CORE
UMC 28nm HLP/LVT Logic and Mixed-Mode Process 7-track PowerSlash Cell Library Library_Group 28nm Silver
FSJ0L_ELU_POWERSLASH
_CORE
UMC 28nm HLP/LVT Logic and Mixed-Mode Process 7-track Powerslash Generic Core Cell Library wtih LPLUS (C-38) Library_Group 28nm Contact Sales
 
FSJ0P_ELS_POWERSLASH
_CORE
UMC 28nm HPC+/LVT Logic and Mixed-Mode Process 7-track POWERSLASH cell library enhanced for routing (C35) Library_Group 28nm Contact Sales
 
Logic Libraries > PowerSlash Core Cell Library
> 7-Track > 7T RVT PSK Library 
Cell Name Descriptions Type Process Gradation Literature
FSJ0C_DRS_POWERSLASH
_CORE
UMC 28nm HPC/RVT Logic and Mixed-Mode Process 7-track POWERSLASH cell library (C35) Library_Group 28nm Silver
FSJ0C_ERS_POWERSLASH
_CORE
UMC 28nm HPC/RVT Logic and Mixed-Mode Process 7-track POWERSLASH cell library enhanced for routing (C35) Library_Group 28nm Silver
FSJ0L_ERD_POWERSLASH
_CORE
UMC 28nm HLP/RVT Logic and Mixed-Mode Process 7-track Powerslash cell library with LMINUS (C-30 RVT) Library_Group 28nm Contact Sales
 
FSJ0L_ERS_POWERSLASH
_CORE
UMC 28nm HLP/RVT Logic and Mixed-Mode Process 7-track Power Slash Cell Library Library_Group 28nm Silver
FSJ0L_ERU_POWERSLASH
_CORE
UMC 28nm HLP/RVT Logic and Mixed-Mode Process 7-track Powerslash Cell Library with LPLUS (C-38) Library_Group 28nm Contact Sales
 
 
Logic Libraries > PowerSlash Core Cell Library
> 7-Track > 7T SVT PSK Library 
Cell Name Descriptions Type Process Gradation Literature
FSJ0P_ERS_POWERSLASH
_CORE
UMC 28nm HPC+/SVT Logic and Mixed-Mode Process 7-track POWERSLASH cell library enhanced for routing (C35) Library_Group 28nm Contact Sales
 
Logic Libraries > PowerSlash Core Cell Library
> 9-Track 
Cell Name Descriptions Type Process Gradation Literature
FSJ0C_ALS_POWERSLASH
_CORE
UMC 28nm HPC/LVT Logic and Mixed-Mode Process 9-track PowerSlash core cell library (C35) Library_Group 28nm Bronze
FSJ0C_ARS_POWERSLASH
_CORE
UMC 28nm HPC/RVT Logic and Mixed-Mode Process 9-track PowerSlash core cell library (C35) Library_Group 28nm Bronze
 
Logic Libraries > PowerSlash Core Cell Library
> 9-Track > 9T HVT PSK Library 
Cell Name Descriptions Type Process Gradation Literature
FSJ0C_CHS_POWERSLASH
_CORE
UMC 28nm HPC/HVT Logic and Mixed-Mode Process 9-track POWERSLASH cell library enhanced for routing (C35) Library_Group 28nm Bronze
FSJ0L_BHS_POWERSLASH
_CORE
UMC 28nm HLP/HVT Logic Process 9-track POWERSLASH_CORE core cell library Library_Group 28nm Silver
FSJ0P_CHS_POWERSLASH
_CORE
UMC 28nm Logic/Mixed-Mode HPC+ Process 9 track HVT C35 Powerslash cell library Library_Group 28nm Contact Sales
 
 
Logic Libraries > PowerSlash Core Cell Library
> 9-Track > 9T LVT PSK Library 
Cell Name Descriptions Type Process Gradation Literature
FSJ0C_CLS_POWERSLASH
_CORE
UMC 28nm HPC/LVT Logic and Mixed-Mode Process 9-track POWERSLASH cell library enhanced for routing (C35) Library_Group 28nm Bronze
 
FSJ0L_BLS_POWERSLASH
_CORE
UMC 28nm HLP/LVT Logic Process 9-track Powerslash standard core cell library (C35) Library_Group 28nm Silver
FSJ0P_CLS_POWERSLASH
_CORE
UMC 28nm Logic/Mixed-Mode HPC+ Process 9 track LVT C35 Powerslash cell library Library_Group 28nm Contact Sales
 
 
Logic Libraries > PowerSlash Core Cell Library
> 9-Track > 9T RVT PSK Library 
Cell Name Descriptions Type Process Gradation Literature
FSJ0C_CRS_POWERSLASH
_CORE
UMC 28nm HPC/RVT Logic and Mixed-Mode Process 9-track POWERSLASH cell library enhanced for routing (C35) Library_Group 28nm Bronze
FSJ0L_BRS_POWERSLASH
_CORE
UMC 28nm Logic and Mixed-Mode HLP/RVT Process 9-track PowerSlash cell library (C35) Library_Group 28nm Silver
FSJ0P_CRS_POWERSLASH
_CORE
UMC 28nm Logic/Mixed-Mode HPC+ Process 9 track RVT C35 Powerslash cell library Library_Group 28nm Contact Sales