2-Port Register File

Updated On:2018-01-23
Gradation
Faraday IPs are rated according to the IPs’ maturity and customer acceptance. They are graded by the rules described as below,


Platinum P Five (5) productions verified
Gold G Mass production proven
Silver S Silicon proven, Formal release
Silver Minus S- Manufacturing onging
Bronze B Pre-Silicon release
 
Memory Compiler > 2-Port Register File
> 8TSRAM > High Density 2PRF, 8TSRAM 
Cell Name Descriptions Type Process Gradation Literature
FSJ0C_A_SZ UMC 28nm HPC process Two Port Register File Memory_IP 28nm Silver Minus
FSJ0C_A_SZB2 UMC 28nm HPC process 2PRF with Bank2 Memory_IP 28nm Contact Sales
 
FSJ0C_A_SZB4 UMC 28nm HPC process Two Port Register File with Bank2 Memory_IP 28nm Bronze
FSJ0L_A_SZ UMC 28nm HLP/Low-K 2PRF compiler Memory_IP 28nm Silver Minus
 
Memory Compiler > 2-Port Register File
> 8TSRAM > High Density 2PRF, 8TSRAM, Peri HVT, Power Gating 
Cell Name Descriptions Type Process Gradation Literature
FSJ0C_L_SZHVT UMC 28nm HPC process PG Two Port Register File with peri-HVT Memory_IP 28nm Bronze
FSJ0C_L_SZHVTB2 UMC 28nm HPC process 2PRF, HVT & Bank2 Memory_IP 28nm Bronze
FSJ0C_L_SZHVTB4 UMC 28nm HPC process PG-2PRF with HVT Bank4 Memory_IP 28nm Bronze
 
Memory Compiler > 2-Port Register File
> 8TSRAM > High Density 2PRF, 8TSRAM, Peri LVT 
Cell Name Descriptions Type Process Gradation Literature
FSJ0C_A_SZLVT UMC 28nm HPC process Two Port Register File with peri LVT Memory_IP 28nm Silver Minus
FSJ0C_A_SZLVTB2 UMC 28nm HPC process Two Port Register File with LVT and Bank2 Memory_IP 28nm Bronze
FSJ0C_A_SZLVTB4 UMC 28nm HPC process Two Port Register File with LVT and Bank4 Memory_IP 28nm Bronze
FSJ0L_A_SZLVT 28HLP periphery LVT Two Port Register File Memory Compiler Memory_IP 28nm Bronze
 
Memory Compiler > 2-Port Register File
> 8TSRAM > High Density 2PRF, 8TSRAM, Peri LVT, Power Gating 
Cell Name Descriptions Type Process Gradation Literature
FSJ0C_L_SZLVT UMC 28nm HPC process PG Two Port Register File with peri-LVT Memory_IP 28nm Bronze
FSJ0C_L_SZLVTB2 UMC 28nm HPC process 2PRF with LVT and Bank 2 Memory_IP 28nm Bronze
FSJ0C_L_SZLVTB4 UMC 28nm HPC process PG-2PRF with LVT and Bank 2 Memory_IP 28nm Bronze
 
Memory Compiler > 2-Port Register File
> 8TSRAM > High Density 2PRF, 8TSRAM, Power Gating 
Cell Name Descriptions Type Process Gradation Literature
FSJ0C_L_SZ UMC 28nm HPC process PG Two Port Register File Memory_IP 28nm Silver Minus
FSJ0C_L_SZB2 UMC 28nm HPC process 2PRF with Bank2 & power gating Memory_IP 28nm Bronze
 
FSJ0C_L_SZB4 UMC 28nm HPC process PG-2PRF with Bank4 Memory_IP 28nm Bronze