Memory Compiler

Updated On:2018-01-21
Gradation
Faraday IPs are rated according to the IPs’ maturity and customer acceptance. They are graded by the rules described as below,


Platinum P Five (5) productions verified
Gold G Mass production proven
Silver S Silicon proven, Formal release
Silver Minus S- Manufacturing onging
Bronze B Pre-Silicon release
 
Memory Compiler > 1-Port Register File
> 6TSRAM > High Density 1PRF, 6TSRAM, Peri HVT 
Cell Name Descriptions Type Process Gradation Literature
FSJ0P_D_SYHVT UMC 28HPC+ 1PRF compiler with HVT peripheral Memory_IP 28nm Contact Sales
 
 
Memory Compiler > 1-Port Register File
> 6TSRAM > High Density 1PRF, 6TSRAM 
Cell Name Descriptions Type Process Gradation Literature
FSJ0C_B_SY UMC 28nm HPC process One Port Register File Memory_IP 28nm Silver Minus
FSJ0C_D_SY UMC 28nm HPC Logic Process Ultra High Density 1-Port Register File Memory Compiler Memory_IP 28nm Silver Minus
FSJ0L_B_SY UMC 28nm HLP/Low-k One Port Register File Memory_IP 28nm Silver Minus
 
FSJ0P_D_SY UMC 28nm HPC Plus Process Standard Synchronous High Density Single Port Register File Memory Compiler. Memory_IP 28nm Contact Sales
 
 
Memory Compiler > 1-Port Register File
> 6TSRAM > High Density 1PRF, 6TSRAM, Peri HVT, Power Gating 
Cell Name Descriptions Type Process Gradation Literature
FSJ0C_D_SYHVT UMC 28HPC 1PRF compiler with HVT peripheral Memory_IP 28nm Bronze
FSJ0C_L_SYHVT UMC 28nm HPC Logic process PG-One Port Register File with HVT Memory_IP 28nm Bronze
 
Memory Compiler > 1-Port Register File
> 6TSRAM > High Density 1PRF, 6TSRAM, Peri LVT 
Cell Name Descriptions Type Process Gradation Literature
FSJ0C_B_SYLVT UMC 28nm HPC process One Port Register File with LVT Memory_IP 28nm Bronze
 
FSJ0C_D_SYLVT UMC 28HPC process 1PRF compiler with LVT peripheral Memory_IP 28nm Bronze
FSJ0L_B_SYLVT UMC 28nm HLP Logic Process One Port Register File with LVT Memory_IP 28nm Bronze
 
 
Memory Compiler > 1-Port Register File
> 6TSRAM > High Density 1PRF, 6TSRAM, Peri LVT, Power Gating 
Cell Name Descriptions Type Process Gradation Literature
FSJ0C_L_SYLVT UMC 28nm HPC Logic process PG One Port Register File with LVT Memory_IP 28nm Bronze
 
Memory Compiler > 1-Port Register File
> 6TSRAM > High Density 1PRF, 6TSRAM, Power Gating 
Cell Name Descriptions Type Process Gradation Literature
FSJ0C_L_SY UMC 28nm HPC Logic process PG One Port Register File Memory_IP 28nm Silver Minus
 
Memory Compiler > 1-Port Register File
> 6TSRAM > Ultra High Speed 1PRF, 6TSRAM  
Cell Name Descriptions Type Process Gradation Literature
FSJ0C_A_SQ UMC 28nm HPC Process Ultra High Speed One Port Register File Memory Compiler Memory_IP 28nm Bronze
FSJ0L_A_SQ UMC 28nm Logic process standard synchronous Ultra High Speed Single Port Register File SRAM memory compiler. Memory_IP 28nm Contact Sales
 
Memory Compiler > 1-Port Register File
> 6TSRAM > Ultra High Speed 1PRF, 6TSRAM, Peri LVT 
Cell Name Descriptions Type Process Gradation Literature
FSJ0C_A_SQLVT UMC 28nm HPC Process Ultra High Speed One Port Register File Memory Compiler with periphery LVT Memory_IP 28nm Silver Minus
FSJ0C_L_SELVT Synchronous LVT Periphery Ultra-High-Speed Single-Port SRAM Compiler Memory_IP 28nm Contact Sales
FSJ0L_A_SQLVT UMC 28nm HLP/UHS 1PRF compiler with peri LVT Memory_IP 28nm Contact Sales