Analog

Updated On:2018-04-25
Gradation
Faraday IPs are rated according to the IPs’ maturity and customer acceptance. They are graded by the rules described as below,


Platinum P Five (5) productions verified
Gold G Mass production proven
Silver S Silicon proven, Formal release
Silver Minus S- Manufacturing onging
Bronze B Pre-Silicon release
 
Analog > Clock
> PLL > over 1G, Generic PLL 
Cell Name Descriptions Type Process Gradation Literature
FXPLL110HJ0C Input 10M-50M Hz, output 25M-1.3G Hz, frequency synthesizable PLL; UMC 28nm HPC Process Analog_IP 28nm Contact Sales
FXPLL110HJ0L Input 20M-200M Hz, output 62.5M-1G Hz, frequency synthesizable PLL; UMC 28nm Logic and Mixed-Mode HLP Process Analog_IP 28nm Contact Sales
 
FXPLL357HJ0C Input 6~27MHz, output 160~3000MHz frequency synthesizable PLL; UMC 28HPC process Analog_IP 28nm Bronze
FXPLL362HJ0C Input 200MHz~400MHz, output 200MHz~1600MHz frequency synthesizable PLL; UMC 28nm HPC Logic Process Analog_IP 28nm Contact Sales
FXPLL362HJ0P Input 200MHz~400MHz, output 200MHz~1600MHz frequency synthesizable PLL; UMC 28nm HPC+ Logic and Mixed-Mode Process Analog_IP 28nm Contact Sales
 
FXPLL530HJ0C Input 6~27MHz, Output 62.5~2000MHz PLL, UMC 28nm HPC process. Analog_IP 28nm Contact Sales