Interface Solution |
Updated On:2018-04-19 |
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Interface Solution > Serdes |
> 1.25G to 8G Serdes > Chassis Management Module for 1.25G to 8G Serdes |
Cell Name |
Descriptions |
Type |
Process |
Gradation |
Literature |
FXCMM0010HJ0C
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CMM lane operating from 1.25G~8G ,UMC 28nm HPC Process |
Analog_IP |
28nm |
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Interface Solution > Serdes |
> 1.25G to 8G Serdes > TX+RX Lane Operating for 1.25G to 8G Serdes |
Cell Name |
Descriptions |
Type |
Process |
Gradation |
Literature |
FXTXRX0010HJ0C
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Analog part of TX+RX lane operating at 1.25G~8Gbps , UMC 28nm HPC Process |
Analog_IP |
28nm |
Contact Sales
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