Interface Solution

Updated On:2018-04-25
Gradation
Faraday IPs are rated according to the IPs’ maturity and customer acceptance. They are graded by the rules described as below,


Platinum P Five (5) productions verified
Gold G Mass production proven
Silver S Silicon proven, Formal release
Silver Minus S- Manufacturing onging
Bronze B Pre-Silicon release
 
Interface Solution > DDR
> DDR PHY - Compensation > LPDDR2 - Compensation 
Cell Name Descriptions Type Process Gradation Literature
FXDDR3COMP50225EWHJ0
L
Compensation Block of DDR3/DDR3L/DDR2/LPDDR2/LPDDR Combo PHY; UMC 28nm HLP/RVT LowK Logic Process; Horizontal version Analog_IP 28nm Contact Sales
FXDDR3COMP50225NSHJ0
L
Compensation Block of DDR3/DDR3L/DDR2/LPDDR2/LPDDR Combo PHY; UMC 28nm HLP/RVT LowK Logic Process; Vertical version Analog_IP 28nm Contact Sales