Logic Libraries

Updated On:2018-01-18
Gradation
Faraday IPs are rated according to the IPs’ maturity and customer acceptance. They are graded by the rules described as below,


Platinum P Five (5) productions verified
Gold G Mass production proven
Silver S Silicon proven, Formal release
Silver Minus S- Manufacturing onging
Bronze B Pre-Silicon release
 
Logic Libraries > Generic Core Cell Library
> 12-Track Library 
Cell Name Descriptions Type Process Gradation Literature
FSH0L_GLS_GENERIC_CO
RE
UMC 40nm LP/LVT Logic Process 12-track generic core cells Library_Group 40nm Bronze
FSH0L_GRS_GENERIC_CO
RE
UMC 40nm LP/RVT LowK Logic Process 12-track Generic Cell Library Library_Group 40nm Bronze
 
Logic Libraries > Generic Core Cell Library
> 12-Track Library > 12T HVT Core Library 
Cell Name Descriptions Type Process Gradation Literature
FSH0L_HHS_GENERIC_CO
RE
UMC 40nm LP/HVT Logic Process 12-Track High Speed Generic Core Cell Library (C40) Library_Group 40nm Silver
 
FSH0L_HHU_GENERIC_CO
RE
UMC 40nm LP/HVT Logic Process 12-Track High Speed Generic Core Cell Library (C50) Library_Group 40nm Silver
 
Logic Libraries > Generic Core Cell Library
> 12-Track Library > 12T LVT Core Library 
Cell Name Descriptions Type Process Gradation Literature
FSH0L_HLS_GENERIC_CO
RE
UMC 40nm LP/LVT Logic Process 12-Track High Speed Standard Core Cell Library Library_Group 40nm Silver
FSH0L_HLU_GENERIC_CO
RE
UMC 40nm LP/LVT Logic Process 12-Track High Speed Generic Core Cell Library (C50) Library_Group 40nm Silver
 
Logic Libraries > Generic Core Cell Library
> 12-Track Library > 12T RVT Core Library 
Cell Name Descriptions Type Process Gradation Literature
FSH0L_HRS_GENERIC_CO
RE
UMC 40nm LP/RVT Logic Process 12-Track High Speed Generic Core Cell Library (C40) Library_Group 40nm Silver
FSH0L_HRU_GENERIC_CO
RE
UMC 40nm LP/RVT Logic Process 12-Track High Speed Generic Core Cell Library (C50) Library_Group 40nm Silver