USB/OTG

Updated On:2018-04-25
Gradation
Faraday IPs are rated according to the IPs’ maturity and customer acceptance. They are graded by the rules described as below,


Platinum P Five (5) productions verified
Gold G Mass production proven
Silver S Silicon proven, Formal release
Silver Minus S- Manufacturing onging
Bronze B Pre-Silicon release
 
Interface Solution > USB/OTG
> USB PHY > USB 2.0 OTG PHY 
Cell Name Descriptions Type Process Gradation Literature
FZOTG266HH0L OTG USB2.0 UMC 40 nm LP/RVT process Analog_IP 40nm Silver
FZOTG266HH0L_LF USB2.0 OTG PHY UMC 40nm LP/RVT process, for Flip chip Bump type_LF Analog_IP 40nm Contact Sales
 
FZOTG268HH0L USB 2.0 On-The-Go PHY; UMC 40nm Logic LP/RVT Low-K Process Analog_IP 40nm Bronze
 
Interface Solution > USB/OTG
> USB PHY > USB 2.0 OTG Two-Port PHY 
Cell Name Descriptions Type Process Gradation Literature
FZOTGTP201HH0L Two Port OTG USB2.0 PHY;BOAC version; Wire bonding;UMC 40 nm LP/RVT process. Analog_IP 40nm Silver Minus
 
Interface Solution > USB/OTG
> USB PHY > USB 2.0 PHY 
Cell Name Descriptions Type Process Gradation Literature
FZUSB299HH0L USB 2.0 PHY,crystal-less option; UMC 40nm LP/RVT process. Analog_IP 40nm Silver Minus
 
Interface Solution > USB/OTG
> USB PHY > USB 3.0 Crystal-less PHY 
Cell Name Descriptions Type Process Gradation Literature
FZUSB399HH0L Crystal-less USB 3.0 PHY ; UMC 40nm Logic/Mixed-Mode Low Power/RVT+LVT Process Analog_IP 40nm Silver Minus
 
Interface Solution > USB/OTG
> USB PHY > USB 3.0 OTG PHY 
Cell Name Descriptions Type Process Gradation Literature
FZOTG300HH0L USB 3.0 PHY ; UMC 40nm Logic/Mixed-Mode Low Power/RVT+LVT Process Analog_IP 40nm Silver
FZOTGC300HH0L USB 3.1 Gen.1 TYPE-C PHY ; UMC 40nm Logic/Mixed-Mode Low Power/RVT+LVT Process Analog_IP 40nm Contact Sales