Memory Compiler

Updated On:2018-01-23
Faraday IPs are rated according to the IPs’ maturity and customer acceptance. They are graded by the rules described as below,

Platinum P Five (5) productions verified
Gold G Mass production proven
Silver S Silicon proven, Formal release
Silver Minus S- Manufacturing onging
Bronze B Pre-Silicon release
Memory Compiler > 1-Port Register File
> 6TSRAM > High Density & Low Power 1PRF, 6TSRAM, Peri LVT 
Cell Name Descriptions Type Process Gradation Literature
FSH0L_H_SYLVT UMC 40nm low power process standard synchronous one port register file SRAM memory compiler with LVT peripheral. Memory_IP 40nm Silver Minus