Memory Compiler

Updated On:2018-06-21
Gradation
Faraday IPs are rated according to the IPs’ maturity and customer acceptance. They are graded by the rules described as below,


Platinum P Five (5) productions verified
Gold G Mass production proven
Silver S Silicon proven, Formal release
Silver Minus S- Manufacturing onging
Bronze B Pre-Silicon release
 
Memory Compiler > ROM
> VIA1 ROM > VIA1 ROM 
Cell Name Descriptions Type Process Gradation Literature
FSH0L_A_SP UMC 40 LP/RVT LowK Logic Process Via1 ROM Memory Compiler Memory_IP 40nm Silver
FSH0L_B_SP UMC 40nm LP Logic Process Via ROM compiler with WL booster Memory_IP 40nm Silver