Analog

Updated On:2018-01-23
Gradation
Faraday IPs are rated according to the IPs’ maturity and customer acceptance. They are graded by the rules described as below,


Platinum P Five (5) productions verified
Gold G Mass production proven
Silver S Silicon proven, Formal release
Silver Minus S- Manufacturing onging
Bronze B Pre-Silicon release
 
Analog > Clock
> SSCG > over 1G, SSCG 
Cell Name Descriptions Type Process Gradation Literature
FXSSCG602HH0L Input clock range:5 ~ 1280 MHz, output clock range:15.625 ~ 2000 MHz wide-range SSCG; UMC UMC 40nm LP/LVT LowK Logic Process Analog_IP 40nm Silver
FXSSCG603HH0L Input clock:8MHz, output clock range:720 ~ 1680 MHz wide-range SSCG; UMC 40nm LP process. Analog_IP 40nm Silver