Memory Compiler

Updated On:2018-04-23
Gradation
Faraday IPs are rated according to the IPs’ maturity and customer acceptance. They are graded by the rules described as below,


Platinum P Five (5) productions verified
Gold G Mass production proven
Silver S Silicon proven, Formal release
Silver Minus S- Manufacturing onging
Bronze B Pre-Silicon release
 
Memory Compiler > 2-Port Register File
> 6TSRAM > High Density and Ultra Low Power 2PRF, 6TSRAM, Peri HVT 
Cell Name Descriptions Type Process Gradation Literature
FSH0U_B_SVHVT UMC 40nm logic ultra low power process two port register file SRAM memory compiler(with 6T SRAM cell) Memory_IP 40nm Contact Sales