A/D Converter

Updated On:2018-01-18
Gradation
Faraday IPs are rated according to the IPs’ maturity and customer acceptance. They are graded by the rules described as below,


Platinum P Five (5) productions verified
Gold G Mass production proven
Silver S Silicon proven, Formal release
Silver Minus S- Manufacturing onging
Bronze B Pre-Silicon release
 
Analog > A/D Converter
 
Cell Name Descriptions Type Process Gradation Literature
FXADC303HF0A 24-Bit Stereo ADC with D-MIC ; UMC 55nm SP/HVT LowK Logic Process Analog_IP 55nm Contact Sales
 
FXADC606HF0U This is new design for pressure sensor ASIC. This ADC will be used with temp sensor. Process is 55uLP process. Need to be low power and smaller die area due to application. Analog_IP 55nm Contact Sales
 
 
Analog > A/D Converter
> Audio ADC > 24Bit Stereo Audio ADC 
Cell Name Descriptions Type Process Gradation Literature
FXADC3021HF0A 24-Bit Stereo ADC with seperated digital audio interface ; UMC 55nm SP/RVT LowK Logic Process Analog_IP 55nm Bronze
FXADC302HF0A 24-Bit Audio Stereo ADCs; UMC 55nm SP/RVT LowK Logic Process Analog_IP 55nm Silver
 
Analog > A/D Converter
> Audio ADC > SigmaDelta Audio ADC 
Cell Name Descriptions Type Process Gradation Literature
FXADC609HF0A Dual channel wide-band Analog-to-Digital Converter (ADC) based on a continuous-time (CT) sigma-delta (Σ-Δ) modulator that achieves 60-dB of dynamic range over a 20 MHz input bandwidth ; UMC 55nm SP LowK Logic Process Analog_IP 55nm Silver Minus
 
Analog > A/D Converter
> Pipelined ADC > 10Bit 2Channel Pipelined ADC 
Cell Name Descriptions Type Process Gradation Literature
FXADC560HF0A 12-Bits 80MSPS Dual-Channel Pipelined ADC; UMC 55nm SP/RVT Low-K Logic Process Analog_IP 55nm Silver
 
Analog > A/D Converter
> Pipelined ADC > 10Bit SingleEnd Input Pipelined ADC 
Cell Name Descriptions Type Process Gradation Literature
FXADC011HF0A 1.0V/3.3V 10Bits 54MSPS Single-end Input Pipelined ADC; UMC 55nm SP, LowK, Logic Process Analog_IP 55nm Silver
 
Analog > A/D Converter
> SAR ADC > 10Bit SAR ADC 
Cell Name Descriptions Type Process Gradation Literature
FXADC1402HF0A_FTCM8A 10 bits 1MSPS SAR ADC ; UMC 55nm SP/RVT Logic LowK Process Analog_IP 55nm Silver
FXADC150HF0A_FTCM8A 10bit 1MSPS SAR ADC with 8-1 Mux (all C-type) ; UMC 55nm SP/RVT LowK Logic Process Analog_IP 55nm Silver
FXADC151HF0A 10-bit 2MSPS SAR-ADC with 2-to-1 Mux in; UMC 55nm SP/RVT process Analog_IP 55nm Silver
FXADC159HF0L_FTCM8A 10-bit 1MSPS Low Power SAR ADC with 8-1 Mux ;UMC 55nm LP/RVT LowK Logic Process Analog_IP 55nm Silver
FXADC250HF0F a 10-bit 1-MSPS 11-to-1 SAR-ADC with 11-channel GPIO integrated based on UMC 55nm eFlash process Analog_IP 55nm Bronze
FXADC890HF0A_FTCM8A A 1.8V, 10-bits 167KSPS 8-TO-1 low power SAR-ADC with internal temperature sensor; UMC 55nm SP/RVT Logic Process Analog_IP 55nm Bronze
FXADC890HF0L_FTCM8A A 1.8V, 10-bits 167KSPS 8-TO-1 low power SAR-ADC with internal temperature sensor; UMC 55nm LP/RVT Logic Process Analog_IP 55nm Silver
 
Analog > A/D Converter
> SAR ADC > 12Bit SAR ADC 
Cell Name Descriptions Type Process Gradation Literature
FXADC125HF0U UMC 55uLP ADC Power: 100k sps < 24uA (TT) 1Msps < 240uA (TT) 5Msps < 1000uA (TT) Inactive < TBD (TT) (Inactive to Active: 4 cycle) Max. sampling: 5M sps VDDA: 1.8V (TT) 1.62V~ 1.98V (ADC and Temp. sensor) VCCK: 1.2V(TT) 0.81V~1.32V (ADC and Temp. sensor) Vref (cap): 1.2V (default) programmable (1.2V, 1.3V, 1.4V and 1.5V), derived from VDDA (Built-in LDO for XVRT; XVRB=GND) fADC clock: 26MHz~ 80MHz Resolution: 12-bit Divider Disable/enable: bridge divider by 4, 3, 2, 1 channel number: 5 ADC Channel assignment: *ADC1: 1 ch with PAD (outside); ADC2: 2 ch with PAD *ADC1: 1 ch for temperature sensor; ADC2: No need to have temperature sensor Temperature Sensor Power: Operation current < 4.7uA (TT) Inactive < TBD(TT) Temperature Sensor Accuracy: +/- 3℃ after calibrated by Faraday in CP or FT Analog_IP 55nm Contact Sales
 
FXADC1502HF0G 12Bit 1Msps SAR-ADC based on UMC 55nm uLP eflash process (GPIO Function integrated) Analog_IP 55nm Silver Minus
FXADC1502HF0L_FTCM8A 12bit 1MSPS SAR ADC with 8-1 Mux (All C-type) ; UMC 55nm LP/RVT Logic Process Analog_IP 55nm Silver
FXADC1502HF0U_FTCM8A 12Bit 1Msps SAR-ADC based on UMC 55nm uLP process Analog_IP 55nm Contact Sales
 
FXADC1642HF0F Low power 12bit 4Msps SAR ADC with UMC 55nm EFLASH Process Analog_IP 55nm Silver Minus
FXADC1722HF0F A 12bit 2Msps low power and large voltage range SAR-ADC based on UMC 55nm eflash process Analog_IP 55nm Bronze
FXADC1723HF0F A 12bit 2Msps low power and large voltage range SAR-ADC based on UMC 55nm eflash process Analog_IP 55nm Contact Sales
 
 
Analog > A/D Converter
> SAR ADC > 8Bit SAR ADC 
Cell Name Descriptions Type Process Gradation Literature
FXADC183HF0A 8 bit 70KSPS SAR ADC;UMC 55nm SP/RVT LowK Logic Process Analog_IP 55nm Silver Minus