Analog

Updated On:2018-04-19
Gradation
Faraday IPs are rated according to the IPs’ maturity and customer acceptance. They are graded by the rules described as below,


Platinum P Five (5) productions verified
Gold G Mass production proven
Silver S Silicon proven, Formal release
Silver Minus S- Manufacturing onging
Bronze B Pre-Silicon release
 
Analog > A/D Converter
 
Cell Name Descriptions Type Process Gradation Literature
FXADC303HF0A 24-Bit Stereo ADC with D-MIC ; UMC 55nm SP/HVT LowK Logic Process Analog_IP 55nm Contact Sales
 
FXADC606HF0U This is new design for pressure sensor ASIC. This ADC will be used with temp sensor. Process is 55uLP process. Need to be low power and smaller die area due to application. Analog_IP 55nm Contact Sales
 
 
Analog > A/D Converter
> Audio ADC > 24Bit Stereo Audio ADC 
Cell Name Descriptions Type Process Gradation Literature
FXADC3021HF0A 24-Bit Stereo ADC with seperated digital audio interface ; UMC 55nm SP/RVT LowK Logic Process Analog_IP 55nm Bronze
FXADC302HF0A 24-Bit Audio Stereo ADCs; UMC 55nm SP/RVT LowK Logic Process Analog_IP 55nm Silver
 
Analog > A/D Converter
> Audio ADC > SigmaDelta Audio ADC 
Cell Name Descriptions Type Process Gradation Literature
FXADC609HF0A Dual channel wide-band Analog-to-Digital Converter (ADC) based on a continuous-time (CT) sigma-delta (Σ-Δ) modulator that achieves 60-dB of dynamic range over a 20 MHz input bandwidth ; UMC 55nm SP LowK Logic Process Analog_IP 55nm Silver Minus
 
Analog > A/D Converter
> Pipelined ADC > 10Bit 2Channel Pipelined ADC 
Cell Name Descriptions Type Process Gradation Literature
FXADC560HF0A 12-Bits 80MSPS Dual-Channel Pipelined ADC; UMC 55nm SP/RVT Low-K Logic Process Analog_IP 55nm Silver
 
Analog > A/D Converter
> Pipelined ADC > 10Bit SingleEnd Input Pipelined ADC 
Cell Name Descriptions Type Process Gradation Literature
FXADC011HF0A 1.0V/3.3V 10Bits 54MSPS Single-end Input Pipelined ADC; UMC 55nm SP, LowK, Logic Process Analog_IP 55nm Silver
 
Analog > A/D Converter
> SAR ADC > 10Bit SAR ADC 
Cell Name Descriptions Type Process Gradation Literature
FXADC1402HF0A_FTCM8A 10 bits 1MSPS SAR ADC ; UMC 55nm SP/RVT Logic LowK Process Analog_IP 55nm Silver
FXADC150HF0A_FTCM8A 10bit 1MSPS SAR ADC with 8-1 Mux (all C-type) ; UMC 55nm SP/RVT LowK Logic Process Analog_IP 55nm Silver
FXADC151HF0A 10-bit 2MSPS SAR-ADC with 2-to-1 Mux in; UMC 55nm SP/RVT process Analog_IP 55nm Silver
FXADC159HF0L_FTCM8A 10-bit 1MSPS Low Power SAR ADC with 8-1 Mux ;UMC 55nm LP/RVT LowK Logic Process Analog_IP 55nm Silver
FXADC250HF0F a 10-bit 1-MSPS 11-to-1 SAR-ADC with 11-channel GPIO integrated based on UMC 55nm eFlash process Analog_IP 55nm Bronze
FXADC890HF0A_FTCM8A A 1.8V, 10-bits 167KSPS 8-TO-1 low power SAR-ADC with internal temperature sensor; UMC 55nm SP/RVT Logic Process Analog_IP 55nm Bronze
FXADC890HF0L_FTCM8A A 1.8V, 10-bits 167KSPS 8-TO-1 low power SAR-ADC with internal temperature sensor; UMC 55nm LP/RVT Logic Process Analog_IP 55nm Silver
 
Analog > A/D Converter
> SAR ADC > 12Bit SAR ADC 
Cell Name Descriptions Type Process Gradation Literature
FXADC125HF0U UMC 55uLP ADC Power: 100k sps < 24uA (TT) 1Msps < 240uA (TT) 5Msps < 1000uA (TT) Inactive < TBD (TT) (Inactive to Active: 4 cycle) Max. sampling: 5M sps VDDA: 1.8V (TT) 1.62V~ 1.98V (ADC and Temp. sensor) VCCK: 1.2V(TT) 0.81V~1.32V (ADC and Temp. sensor) Vref (cap): 1.2V (default) programmable (1.2V, 1.3V, 1.4V and 1.5V), derived from VDDA (Built-in LDO for XVRT; XVRB=GND) fADC clock: 26MHz~ 80MHz Resolution: 12-bit Divider Disable/enable: bridge divider by 4, 3, 2, 1 channel number: 5 ADC Channel assignment: *ADC1: 1 ch with PAD (outside); ADC2: 2 ch with PAD *ADC1: 1 ch for temperature sensor; ADC2: No need to have temperature sensor Temperature Sensor Power: Operation current < 4.7uA (TT) Inactive < TBD(TT) Temperature Sensor Accuracy: +/- 3℃ after calibrated by Faraday in CP or FT Analog_IP 55nm Contact Sales
 
FXADC1502HF0G 12Bit 1Msps SAR-ADC based on UMC 55nm uLP eflash process (GPIO Function integrated) Analog_IP 55nm Silver Minus
FXADC1502HF0L_FTCM8A 12bit 1MSPS SAR ADC with 8-1 Mux (All C-type) ; UMC 55nm LP/RVT Logic Process Analog_IP 55nm Silver
FXADC1502HF0U_FTCM8A 12Bit 1Msps SAR-ADC based on UMC 55nm uLP process Analog_IP 55nm Contact Sales
 
FXADC1642HF0F Low power 12bit 4Msps SAR ADC with UMC 55nm EFLASH Process Analog_IP 55nm Silver Minus
FXADC1722HF0F A 12bit 2Msps low power and large voltage range SAR-ADC based on UMC 55nm eflash process Analog_IP 55nm Bronze
FXADC1723HF0F A 12bit 2Msps low power and large voltage range SAR-ADC based on UMC 55nm eflash process Analog_IP 55nm Contact Sales
 
Analog > A/D Converter
> SAR ADC > 8Bit SAR ADC 
Cell Name Descriptions Type Process Gradation Literature
FXADC183HF0A 8 bit 70KSPS SAR ADC;UMC 55nm SP/RVT LowK Logic Process Analog_IP 55nm Silver Minus
 
Analog > Amplifier
> Mono Speaker Amplifier 
Cell Name Descriptions Type Process Gradation Literature
FXSPK508HF0A 5V 1W Mono Speaker Amplifier, UMC 55nm SP/RVT LowK Logic Process. Analog_IP 55nm Silver Minus
 
Analog > Amplifier
> Programmable Gain Amplifier 
Cell Name Descriptions Type Process Gradation Literature
FXPGA010HF0A An 8-bit 10MSPS Programmable Gain Amplifier ;UMC 55nm SP-HVT LowK Logic Process Analog_IP 55nm Silver
 
Analog > Analog Front Ends
> Image Processing AFE 
Cell Name Descriptions Type Process Gradation Literature
FXAFE010HF0A FXAFE010HF0A is an Analog Front End IP for CMOS image processing applications. FXAFE010HF0A is fabricated in UMC 55nm SP, low-k, logic process to enable size reduction and utilizes an 8-bit Programmable Gain Amplifier (PGA) with a 2:1 input multiplexer, a 10-bit pipelined analog-to-digital converter (ADC), and a 10-bit offset correction digital-to-analog converter (DAC) to implement a signal processing solution for scanners, video and CMOS imaging applications. Analog_IP 55nm Silver
 
Analog > Analog Front Ends
> OFDM AFE 
Cell Name Descriptions Type Process Gradation Literature
FXAFE010HF0F OFDM AFE using UMC 55nm eFlash Process Analog_IP 55nm Contact Sales
 
FXAFE010HF0L OFDM Analog Front End(AFE) , UMC 55nm LP Low-K Logic Process Analog_IP 55nm Contact Sales
 
FXAFE020HF0L OFDM Analog Front End(AFE) , UMC 55nm LP Low-K Logic Process Analog_IP 55nm Bronze
 
Analog > Clock
> DDR DLL > 20M ~ 500M, DDR DLL 
Cell Name Descriptions Type Process Gradation Literature
FXDLL310HF0A Input 200-400MHz, output 200-400MHz, DDR2 DLL; UMC 55nm SP Low-K Logic Process Analog_IP 55nm Silver
FXDLL340HF0A Input 80-320MHz, output 6.25%~50% delay,80-320MHz, DDR2 DLL; UMC 55nm SP/RVT LowK Logic Process Analog_IP 55nm Silver
 
Analog > Clock
> DLL > 20M ~ 500M, DLL 
Cell Name Descriptions Type Process Gradation Literature
FXDLL340HF0L UMC 55nm LP/RVT Low-K logic process, Operating frequency 80MHz-320MHz, DQS delay 6.25%-50%. Analog_IP 55nm Silver Minus
FXDLL341HF0A Input 80MHz-280MHz, DQS delay 3.125%-50% of FREF period, UMC 55nm SP/RVT Low-K logic process. Analog_IP 55nm Silver Minus
 
Analog > Clock
> Digitized DLL > 500M ~ 1G, Digitalized DLL 
Cell Name Descriptions Type Process Gradation Literature
FXADDLL310HF0A Input 333M-800MHz, output 333M-800MHz, all digital DLL with one-channel DQS delay range ; UMC 55nm SP/RVT LowK Logic Process Analog_IP 55nm Bronze
FXADDLL310HF0L Input 333M-800MHz, output 333M-800MHz, all digital DLL with one-channel DQS delay range ; UMC 55nm LP/RVT LowK Logic Process Analog_IP 55nm Silver Minus
 
FXADDLL340HF0A Input 333M-800MHz, output 333M-800MHz, all digital DLL with per 1/64UI programmable delay ; UMC 55nm SP/RVT Low-K Logic Process Analog_IP 55nm Silver
 
Analog > Clock
> Oscillator 
Cell Name Descriptions Type Process Gradation Literature
FXOSC003HF0L Self-contained ring oscillator, frequency 32KHz. VCC11A=1.08V~1.32V; UMC 55nm LP/RVT Low-K Logic process Analog_IP 55nm Bronze
 
FXOSC003HF0U NO External-R ,frequency 32.768KHz , Oscillator . Input 0.9V+/-10%; UMC 55nm ULP process. Analog_IP 55nm Silver Minus
FXOSC005HF0A Output frequency 10KHz. Input 0.9V-1.1V,Oscillator ; UMC 55nm SP/RVT LowK Logic Process Analog_IP 55nm Contact Sales
 
FXOSC008HF0F Internal-R, frequency 48MHz/8MHz. Input 1.08V-1.32V; UMC 55nm EFLASH process Analog_IP 55nm Bronze
FXOSC008HF0L Internal-RC, frequency 8MHz. Input 1.08V-1.32V ; UMC 55nm LP/RVT LowK Logic Process Analog_IP 55nm Silver Minus
 
FXOSC008HF0U Internal-RC, frequency 8.192M. Input 0.81V-1.32V; UMC 55nm Ultra Low Power process. Analog_IP 55nm Contact Sales
FXOSC032HF0G internal-R, frequency 32.768MHz RC OSC. Input 0.9V±10% or 1.2V±10% ; UMC 55 nm EFLASH process Analog_IP 55nm Silver Minus
FXOSC032HF0L Crystal oscillator, frequency 32.768kHz, input 1.62~3.6V, UMC 55nm LP/RVT LowK Logic Process Analog_IP 55nm Contact Sales
FXOSC032HF0U NO External-R ,frequency 32.768MHz , Oscillator . Input 0.9V+/-10% ,1.2V+/-10% ; UMC 55nm ULP process. Analog_IP 55nm Silver Minus
FXOSC033HF0U Crystal oscillator, frequency 32.768kHz, input 1.62~3.6V, UMC 55nm uLP/RVT LowK Logic Process Analog_IP 55nm Contact Sales
 
FXOSC040HF0A Internal RC, output 40MHz with +/-5% frequency accuracy OSC, UMC 55nm SP/RVT Low-K logic Process Analog_IP 55nm Bronze
FXOSC045HF0F NO External-R ,frequency 30K~60K ,RC Oscillator . Power:2.0V~3.6V; UMC 55nm EFLASH process. Analog_IP 55nm Bronze
FXOSC045HF0L NO External-R ,frequency 30K~60K ,RC Oscillator . Power:2.0V~3.6V; UMC 55nm LP process. Analog_IP 55nm Silver Minus
FXOSC048HF0L Internal-R, frequency 48MHz/8MHz. Input 1.08V-1.32V; UMC 55nm lp process Analog_IP 55nm Contact Sales
FXOSC048HF0U Internal-R, frequency 48MHz/32MHz/16MHz/8MHz, Input 1.08V-1.32V; UMC 55nm Low K Ultra low power process Analog_IP 55nm Contact Sales
FXOSC060HF0A Output frequency 32KHz. Input 0.9V-1.1V; UMC 55nm SP/RVT LowK Logic Process Analog_IP 55nm Contact Sales
 
FXOSC348HF0U Internal-R, frequency 48KHz. Input 1.14v-3.63v; UMC 55nm ULP process Analog_IP 55nm Contact Sales
 
 
Analog > Clock
> PLL > 20M ~ 500M, Generic PLL 
Cell Name Descriptions Type Process Gradation Literature
FXPLL004HF0L Input 2MHz~16MHz, output 16~72MHz and 72MHz~200MHz, 1.08~1.32V PLL; UMC 55nm Low Power Process. Analog_IP 55nm Silver Minus
FXPLL010HF0A Input 10M-310M Hz, output 20M-310M Hz, frequency synthesizable PLL; UMC 55nm SP/RVT Process Analog_IP 55nm Contact Sales
 
FXPLL010HF0L Input 10M-200M Hz, output 20M-300M Hz, frequency synthesizable PLL; UMC 55nm LP/RVT Low-K Logic Process Analog_IP 55nm Silver
FXPLL060HF0A Input 20M-200M Hz, output 20M-300M Hz, frequency synthesizable PLL; UMC 55nm SP/RVT Low-K Logic Process Analog_IP 55nm Silver
FXPLL327HF0L Input 32.768KHz, Output 12 and 48MHz PLL; UMC 55nm LP/RVT Logic Process Analog_IP 55nm Silver
FXPLL362HF0L Input 200MHz - 400MHz, output clock_1X 200MHz - 400MHz, output clock_2X 400MHz - 800MHz, output clock_4X 800MHz-1600MHz,frequency synthesizable PLL;UMC 55nm LP/RVT LowK Logic process Analog_IP 55nm Silver Minus
FXPLLG011HF0L Input 10M-200M Hz, output 20M-400M Hz, frequency synthesizable PLL; UMC 55nm LP/RVT Low-K Logic Process Analog_IP 55nm Contact Sales
 
 
Analog > Clock
> PLL > 500M ~ 1G, Generic PLL 
Cell Name Descriptions Type Process Gradation Literature
FXPLL032HF0A Input 10M-200M Hz, output 300M-600M Hz, frequency synthesizable PLL ; UMC 55nm SP Low-K Logic Process Analog_IP 55nm Silver
FXPLL033HF0A Input 20M-50M Hz, output 300M-600M Hz, frequency synthesizable PLL; UMC 55nm SP/RVT process Analog_IP 55nm Silver Minus
FXPLL350HF0A Input 33.33M-100M Hz, output 400M-800M Hz, frequency synthesizable PLL; UMC 55nm SP-RVT Low-K process Analog_IP 55nm Silver
FXPLL360HF0F Input 20M-66M Hz, output 400M-800M Hz, frequency synthesizable PLL; UMC 55nm EFLASH RVT LowK Logic Process Analog_IP 55nm Silver Minus
FXPLL360HF0G Input 20M-66M Hz, output 400M-800M Hz, frequency synthesizable PLL; UMC 55nm EFLASH/EE2PROM ULP RVT LowK Logic Process Analog_IP 55nm Silver Minus
FXPLL360HF0L Input 25M-66M Hz, output 400M-800M Hz, frequency synthesizable PLL; UMC 55nm LP/RVT LowK Logic Process Analog_IP 55nm Silver
FXPLL610HF0F Input 2MHz~16MHz, output 16~1000MHz, 1.08~1.32V small-size PLL; UMC 55nm Eflash Process. Analog_IP 55nm Bronze
 
Analog > Clock
> PLL > over 1G, Generic PLL 
Cell Name Descriptions Type Process Gradation Literature
FXPLL080HF0A Input 12MHz, output 800 MHz/1000MHz, 533 MHz/666 MHz, 400 MHz/500 MHz, 266 MHz/533 MHz, frequency synthesizable PLL; UMC 55nm SP/RVT LowK Logic Process Analog_IP 55nm Silver
FXPLL080HF0A_MTD Input 12MHz, output 900 MHz/1200MHz, 600 MHz/800 MHz, 360 MHz/480MHz, 300 MHz/400MHz, frequency synthesizable PLL; UMC 55nm SP/RVT LowK Logic Process Analog_IP 55nm Contact Sales
 
FXPLL150HF0A Input 33M-300M Hz, output 1000M-1500M Hz, frequency synthesizable PLL; UMC 55nm SP-RVT Low-K process Analog_IP 55nm Silver
FXPLL362HF0A Input 200M-400M Hz, output 800M-1600M,400-800MHz and 200-400MHz , frequency synthesizable PLL; UMC 55nm SP/RVT LowK Logic Process Analog_IP 55nm Silver Minus
 
Analog > Clock
> SSCG > over 1G, SSCG 
Cell Name Descriptions Type Process Gradation Literature
FXSSCG602HF0A Input clock range:5 ~ 1280 MHz, output clock range:15.625 ~ 2000 MHz wide-range SSCG; UMC 55nm SP process. Analog_IP 55nm Silver
FXSSCG602HF0L Input clock range:5 ~ 1280 MHz, output clock range:15.625 ~ 2000 MHz wide-range SSCG; UMC 55nm LP process. Analog_IP 55nm Silver
 
Analog > D/A Converter
> Audio DAC > 24Bit Audio DAC 
Cell Name Descriptions Type Process Gradation Literature
FXDAC260HF0A 80MHz 2-chanel DAC ; UMC 55nm SP/RVT LowK Logic Process Analog_IP 55nm Silver
FXDAC300HF0A 24bit 96KHz Audio Codec ; UMC 55nm SP/RVT 2.5OD3.3 Logic Process Analog_IP 55nm Silver
 
Analog > D/A Converter
> Differential DAC > 10Bit Differential DAC 
Cell Name Descriptions Type Process Gradation Literature
FXDAC021HF0A 10bit 150MSPS current output differential-end D/A Converter ; UMC 55nm SP/RVT LowK Logic Process Analog_IP 55nm Bronze
 
Analog > D/A Converter
> R-2R DAC > 10Bit R-2R DAC 
Cell Name Descriptions Type Process Gradation Literature
FXDAC120HF0A 10bits 1MHz Voltage output R-2R D/A Converter; UMC 55nm SP-RVT process Analog_IP 55nm Silver
FXDAC130HF0A 10bits 1MHz R-2R D/A Converter with rail to rail voltage output ; UMC 55nm SP-RVT process Analog_IP 55nm Silver
FXDAC130HF0G 10bits 1MHz R-2R D/A Converter with rail to rail voltage output ; UMC 55nm eFlash (SST) process Analog_IP 55nm Silver Minus
FXDAC130HF0U 10bits 1MHz R-2R D/A Converter with rail to rail voltage output ; UMC 55nm ULP process Analog_IP 55nm Silver Minus
FXDAC1502HF0F 12 bit 1MSPS R-2R DAC; UMC 55nm eFlash process Analog_IP 55nm Bronze
 
Analog > D/A Converter
> R-2R DAC > 12Bit R-2R DAC 
Cell Name Descriptions Type Process Gradation Literature
FXDAC1502HF0A 12bits 1MHz Voltage output R-2R D/A Converter; UMC 55nm SP-RVT process Analog_IP 55nm Bronze
 
Analog > D/A Converter
> Video DAC > 10Bit 1-Channel Video DAC 
Cell Name Descriptions Type Process Gradation Literature
FXDAC022HF0A 10bit 150MSPS current output differential-end D/A Converter ; UMC 55nm SP/RVT LowK Logic Process Analog_IP 55nm Silver Minus
 
Analog > D/A Converter
> Video DAC > 10Bit 3-Channel Video DAC 
Cell Name Descriptions Type Process Gradation Literature
FXDAC031HF0A A small area 10bit 150MSPS 3-channel Video DAC ; UMC 55nm SP/RVT LowK Logic Process Analog_IP 55nm Silver
FXDAC032HF0A A small area 10bit 150MSPS 3-channel Video DAC ; UMC 55nm SP/RVT LowK Logic Process Analog_IP 55nm Silver Minus
 
Analog > Others
> Testkey 
Cell Name Descriptions Type Process Gradation Literature
FXTKEY010HF0F Input 20M-66M Hz, output 500M-1000M Hz, frequency synthesizable PLL; UMC 55nm EFLASH RVT LowK Logic Process Analog_IP 55nm Contact Sales
 
 
Analog > Power
> Band Gap 
Cell Name Descriptions Type Process Gradation Literature
FXBG010HF0A Input 2.25V-2.75V, VBG=1.22V, Band Gap, SP process; UMC 55nm SP/RVT LowK Logic process Analog_IP 55nm Bronze
FXBG011HF0A Input 3V-3.6V, VBG=1.22V, BandGap; UMC 55nm SP/RVT LowK Logic process Analog_IP 55nm Silver
FXBG011HF0F Power input 3.3V, VBG=1.204V Band-gap, UMC 55nm eFlash process Analog_IP 55nm Bronze
FXBG011HF0L Input 2.25V-2.75V, VBG=1.2V Band-gap, UMC 55nm LP/RVT Logic Process Analog_IP 55nm Bronze
FXBG012HF0F Input 2.0V-3.6V, VBG=1.2V Band-gap, UMC 55nm eflash LP/RVT Logic Process Analog_IP 55nm Bronze
FXBG012HF0L Input 2.0V-3.6V, VBG=1.2V Band-gap, UMC 55nm LP/RVT Logic Process Analog_IP 55nm Silver Minus
FXBG020HF0L Input 1.2V, VBG04=0.4V BandGap; UMC 55nm LP/RVT Low-K Logic Process Analog_IP 55nm Bronze
FXBG100HF0A Power input 3.3v, VBG=880.3 mV Band-gap, UMC 55nm SP/RVT LowK PROCESS Analog_IP 55nm Bronze
FXBG121HF0U Input 1.0V-3.6V, VBG=0.75V, Band Gap; UMC 55nm ULP Low-K Logic process Analog_IP 55nm Bronze
 
Analog > Power
> Linear Regulator 
Cell Name Descriptions Type Process Gradation Literature
FXREG010HF0L 2.7V~3.3V to 1.8V with 150mA driving capability; Linear Regulator; UMC 55nm LP/RVT LowK Logic Process Analog_IP 55nm Silver Minus
FXREG010HF0L_ADC2 3.3v to 2.5v/5mA , REG, Linear Regulator, UMC 55nm LP/RVT Logic Process Analog_IP 55nm Contact Sales
 
FXREG012HF0A 3.3V to 2.8V with 20mA driving capability; Linear Regulator; UMC 55nm SP/RVT Logic Process Analog_IP 55nm Silver
 
FXREG013HF0A 3.3V input , Programmable Output 1.8V/1.2V with 300mA driving capability; Linear Regulator; UMC 55nm SP/RVT LowK Logic Process Analog_IP 55nm Silver Minus
FXREG020HF0A 3.3V to 1.0V with 150mA driving capability; Linear Regulator; UMC 55nm SP/RVT LowK Logic Process Analog_IP 55nm Bronze
 
FXREG020HF0F 3.3V to 1.2V with 180mA driving capability; Linear Regulator; UMC 55nm eFlash LowK Logic process Analog_IP 55nm Bronze
FXREG020HF0L 3.3V to 1.2V with 150mA driving capability; Linear Regulator; UMC 55nm LP/RVT LowK Logic Process Analog_IP 55nm Silver
 
FXREG020HF0U 3.3V to 1.2V (programmable output) with 50mA driving capability without external capacitor(cap-less);two embedded linear voltage regulators(main regulator and the low-power regulator); UMC 55nm ulp Low K Process Analog_IP 55nm Contact Sales
 
FXREG021HF0A 3.3v to 1.0v/100mA REG, Linear Regulator, UMC 55nm SP/RVT LowK Logic Process Analog_IP 55nm Silver Minus
FXREG022HF0A 3.3V to 1.0V with 500mA driving capability with external capacitor(use efuse trimming); Linear Regulator; UMC 55nm SP/RVT LowK Logic Process Analog_IP 55nm Contact Sales
 
FXREG024HF0F 3.3V to 1.2V with 150mA driving capability without external capacitor(Cap-less); use trimming ports (need e-Fuse IP); Linear Regulator; UMC 55nm eFlash LowK Logic Process Analog_IP 55nm Contact Sales
 
FXREG024HF0L 3.3v to 1.2v/150mA REG, Linear Regulator, UMC 55nm LP/RVT LowK Logic process Analog_IP 55nm Silver Minus
FXREG026HF0A 1.7V~3.6V to 1.0V with 600mA driving capability, Linear Regulator,UMC 55nm LP/RVT LowK Logic Process Analog_IP 55nm Silver Minus
FXREG120HF0U_NPWELL 3.3V to 0.3V and VCCK-0.3V / 10mA voltage source for N/P well forward body bias, Linear Regulator, UMC 55nm uLP/RVT Low-K Logic Process Analog_IP 55nm Contact Sales
FXREG121HF0U 1.0~3.6V input, loading 20mA, 0.9V output with VBG=0.75V Linear Regulator; UMC 55nm LP/UHVT LowK Logic Process Analog_IP 55nm Silver
FXREG122HF0G 3.3V to 1.2V/0.9V with 100mA driving capability;Linear Regulator, UMC 55nm uLP/RVT Low-K Logic Process Analog_IP 55nm Bronze
FXREG122HF0U 3.3V to 1.2V/0.9V with 100mA driving capability;Linear Regulator, UMC 55nm uLP/HVT Low-K Logic Process Analog_IP 55nm Silver Minus
 
FXREG301HF0L 3.3V to 0.75*VCC33A with 5mA driving capability with external capacitor; Linear Regulator; UMC 55nm LP/RVT LowK Logic Process Analog_IP 55nm Contact Sales
 
 
Analog > Power
> PWM Regulator 
Cell Name Descriptions Type Process Gradation Literature
FXPWM220HF0F 3V~4.6V to 1.2V~2.5V / 600mA Current mode PWM, Switching Regulator, UMC 55nm eFlash LowK Logic Process Analog_IP 55nm Contact Sales
 
FXPWM220HF0L 3V~4.6V to 1.2V~2.5V / 600mA Current mode PWM, Switching Regulator, UMC 55nm LP LowK Logic Process Analog_IP 55nm Contact Sales
 
 
Analog > Power
> Power Switch 
Cell Name Descriptions Type Process Gradation Literature
FXPSW010HF0L 2 Input Power Switch; UMC 55nm LP/RVT LowK Logic Process Analog_IP 55nm Silver Minus
 
Analog > Power
> Power on Reset 
Cell Name Descriptions Type Process Gradation Literature
FXPOR231HF0U this Ip includes programmble power on reset function(BOR0~5) and voltage reference VREEF=1.3V and sink/source current reference (10nA 50nA 100nA), supply volatage VCCA=1.62~3.6V,UMC 55nm ulp LowK Logic process Analog_IP 55nm Contact Sales
 
FXPORK030HF0L Vrr=Vfr=0.8V,input VCC=1.2V, 1.2V Power On Reset; UMC 55nm 1P10M2T LP/RVT LowK Logic Process Analog_IP 55nm Silver Minus
FXPORK035HF0A Vrr=0.67V, Vfr=0.62, input 1.0V, Core type; Power On Reset; UMC 55nm SP/RVT LowK Process Analog_IP 55nm Silver
FXPORK230HF0F Vrr=0.8V,Vfr=0.65V,input VCC=1.2V, 1.2V Power On Reset; UMC 55nm e-flash Logic Process Analog_IP 55nm Bronze
FXPORK230HF0L Vrr=0.8V,Vfr=0.65V,input VCC=1.2V, 1.2V Power On Reset; UMC 55nm 1P10M2T LP/RVT LowK Logic Process Analog_IP 55nm Silver Minus
FXPORK230HF0U Vrr=0.65V Vfr=0.6V, Input VCC=1.2V, Power On Reset; UMC 55nm uLP Logic Process Analog_IP 55nm Contact Sales
FXPORKH075HF0A 3.9~1.5V (RTC core cell operating voltage+), Rise-relax voltage (Vrr), min. 1.6V (1.6V~2.3V) Power On Reset ; UMC 55nm SP/RVT LowK Logic Process Analog_IP 55nm Bronze
 
FXPORKHR035HF0G 3.3V RTC Power On Reset; UMC 55nm uLP/SST Logic Process Analog_IP 55nm Bronze
 
FXPORKHR035HF0U 3.3V RTC Power On Reset; UMC 55nm uLP Logic Process Analog_IP 55nm Silver Minus
FXPORKHR045HF0U Vrr=0.8V,Input 1.14V~3.63V RTC Power On Reset; UMC 55nm uLP Logic Process Analog_IP 55nm Contact Sales
 
FXPORKHR200HF0F Input VCC3V=3.3V, 3.3V Power On Reset without Vfr; UMC 55nm eFlash Logic Process Analog_IP 55nm Contact Sales
FXPORKHR200HF0L Input VCC3V=3.3V, 3.3V Power On Reset without Vfr; UMC 55nm LP Logic Process Analog_IP 55nm Bronze
FXPORKHR230HF0F Input VCC3V=3.3V, 3.3V Power On Reset; UMC 55nm eFlash Logic Process Analog_IP 55nm Contact Sales
FXPORKHR230HF0L Input VCC3V=3.3V, 3.3V Power On Reset; UMC 55nm LP Logic Process Analog_IP 55nm Silver Minus
FXPORKHR730HF0U Vrr=0.8V Vfr=0.75V, Input VCC=3.3V, Power On Reset; UMC 55nm uLP Logic Process RTC library Analog_IP 55nm Contact Sales
 
FXPORKLH035HF0A Vrr=2.81V Vfr=2.81, input VCCK=1.0V VCC3IO=3.3V, 3.3V Power On Reset;special request; UMC 55nm SP/RVT LowK Logic Process Analog_IP 55nm Silver
FXPORKLH530HF0F Input VCC=1.2V & VCC3V=3.3V, 1.2/3.3V Power On Reset; UMC 55nm eflash Logic Process Analog_IP 55nm Bronze
FXPORKLH530HF0G Input VCC=1.2V & VCC3V=3.3V, 1.2/3.3V Power On Reset; UMC 55nm uLP/SST Logic Process Analog_IP 55nm Silver Minus
FXPORKLH530HF0L Input VCC=1.2V& VCC3V=3.3V, 1.2/3.3V Power On Reset; UMC 55nm LP Logic Process Analog_IP 55nm Silver
FXPORKLH530HF0U Input VCC=1.2V & VCC3V=3.3V, 1.2/3.3V Power On Reset; UMC 55nm uLP Logic Process Analog_IP 55nm Bronze
 
Analog > Power
> Voltage Detector 
Cell Name Descriptions Type Process Gradation Literature
FXVDT010HF0A Voltage detector; UMC 55nm Logic SP/RVT Low-K Process Analog_IP 55nm Silver Minus
FXVDT020HF0F Voltage Detect Vdet1=2.8V,Vhys1=0.1V, Vdet2=2.6V, Vhys2=0.1V.Vdet2 rsie delay>10ms, fall delay<1ms. Generate high/low level logic for a precise power supply monitoring system; UMC 55nm eFlash Process Analog_IP 55nm Silver Minus
FXVDT021HF0A 4-Level Voltage Detector for USB-OTG ; UMC 55nm 2.5V overdrive 3.3V device SP/HVT LowK Logic Process Analog_IP 55nm Bronze
FXVDT021HF0F 4-Level Voltage Detector for USB-OTG ; UMC 55nm eflash LP/RVT Process Analog_IP 55nm Bronze
FXVDT021HF0L 4-Level Voltage Detector for USB-OTG ; UMC 55nm 2.5V overdrive 3.3V device LP/HVT LowK Logic Process Analog_IP 55nm Silver
FXVDT022HF0A 2-sets voltage detector ; UMC 55nm Logic SP/RVT Low-K Process Analog_IP 55nm Silver Minus
FXVDT022HF0F 2-sets voltage detector; UMC 55nm eflash LP/RVT Process Analog_IP 55nm Contact Sales
 
FXVDT022HF0L 2-sets voltage detector; UMC 55 nm Logic LP/RVT Low-K Process Analog_IP 55nm Silver Minus
FXVDT023HF0F programmable voltage detector; umc55nm eflash Analog_IP 55nm Bronze
FXVDT028HF0U programmable voltage detector; umc55ulp Analog_IP 55nm Contact Sales
 
FXVDT110HF0G Power input 3.3V, Comparator ; UMC 55nm SST uLP/HVT Low-K Logic Process Analog_IP 55nm Bronze
FXVDT110HF0U Power input 3.3V, Comparator , UMC 55nm uLP/HVT Low-K Logic Process Ultra High Density (6T) C60 Core Cell Library Analog_IP 55nm Silver Minus
FXVDT121HF0U Power input 3.3V, 2-set Comparator; UMC 55nm ulp LowK Logic process Analog_IP 55nm Contact Sales
 
FXVDT730HF0U Vrr=0.77V Vfr=0.75V, Input VCC=1.8V, Voltage Detector; UMC 55nm uLP Logic Process RTC library Analog_IP 55nm Contact Sales