Clock

Updated On:2018-04-23
Gradation
Faraday IPs are rated according to the IPs’ maturity and customer acceptance. They are graded by the rules described as below,


Platinum P Five (5) productions verified
Gold G Mass production proven
Silver S Silicon proven, Formal release
Silver Minus S- Manufacturing onging
Bronze B Pre-Silicon release
 
Analog > Clock
> DDR DLL > 20M ~ 500M, DDR DLL 
Cell Name Descriptions Type Process Gradation Literature
FXDLL310HF0A Input 200-400MHz, output 200-400MHz, DDR2 DLL; UMC 55nm SP Low-K Logic Process Analog_IP 55nm Silver
FXDLL340HF0A Input 80-320MHz, output 6.25%~50% delay,80-320MHz, DDR2 DLL; UMC 55nm SP/RVT LowK Logic Process Analog_IP 55nm Silver
 
Analog > Clock
> DLL > 20M ~ 500M, DLL 
Cell Name Descriptions Type Process Gradation Literature
FXDLL340HF0L UMC 55nm LP/RVT Low-K logic process, Operating frequency 80MHz-320MHz, DQS delay 6.25%-50%. Analog_IP 55nm Silver Minus
FXDLL341HF0A Input 80MHz-280MHz, DQS delay 3.125%-50% of FREF period, UMC 55nm SP/RVT Low-K logic process. Analog_IP 55nm Silver Minus
 
Analog > Clock
> Digitized DLL > 500M ~ 1G, Digitalized DLL 
Cell Name Descriptions Type Process Gradation Literature
FXADDLL310HF0A Input 333M-800MHz, output 333M-800MHz, all digital DLL with one-channel DQS delay range ; UMC 55nm SP/RVT LowK Logic Process Analog_IP 55nm Bronze
FXADDLL310HF0L Input 333M-800MHz, output 333M-800MHz, all digital DLL with one-channel DQS delay range ; UMC 55nm LP/RVT LowK Logic Process Analog_IP 55nm Silver Minus
 
FXADDLL340HF0A Input 333M-800MHz, output 333M-800MHz, all digital DLL with per 1/64UI programmable delay ; UMC 55nm SP/RVT Low-K Logic Process Analog_IP 55nm Silver
 
Analog > Clock
> Oscillator 
Cell Name Descriptions Type Process Gradation Literature
FXOSC003HF0L Self-contained ring oscillator, frequency 32KHz. VCC11A=1.08V~1.32V; UMC 55nm LP/RVT Low-K Logic process Analog_IP 55nm Bronze
 
FXOSC003HF0U NO External-R ,frequency 32.768KHz , Oscillator . Input 0.9V+/-10%; UMC 55nm ULP process. Analog_IP 55nm Silver Minus
FXOSC005HF0A Output frequency 10KHz. Input 0.9V-1.1V,Oscillator ; UMC 55nm SP/RVT LowK Logic Process Analog_IP 55nm Contact Sales
 
FXOSC008HF0F Internal-R, frequency 48MHz/8MHz. Input 1.08V-1.32V; UMC 55nm EFLASH process Analog_IP 55nm Bronze
FXOSC008HF0L Internal-RC, frequency 8MHz. Input 1.08V-1.32V ; UMC 55nm LP/RVT LowK Logic Process Analog_IP 55nm Silver Minus
 
FXOSC008HF0U Internal-RC, frequency 8.192M. Input 0.81V-1.32V; UMC 55nm Ultra Low Power process. Analog_IP 55nm Contact Sales
FXOSC032HF0G internal-R, frequency 32.768MHz RC OSC. Input 0.9V±10% or 1.2V±10% ; UMC 55 nm EFLASH process Analog_IP 55nm Silver Minus
FXOSC032HF0L Crystal oscillator, frequency 32.768kHz, input 1.62~3.6V, UMC 55nm LP/RVT LowK Logic Process Analog_IP 55nm Contact Sales
FXOSC032HF0U NO External-R ,frequency 32.768MHz , Oscillator . Input 0.9V+/-10% ,1.2V+/-10% ; UMC 55nm ULP process. Analog_IP 55nm Silver Minus
FXOSC033HF0U Crystal oscillator, frequency 32.768kHz, input 1.62~3.6V, UMC 55nm uLP/RVT LowK Logic Process Analog_IP 55nm Contact Sales
 
FXOSC040HF0A Internal RC, output 40MHz with +/-5% frequency accuracy OSC, UMC 55nm SP/RVT Low-K logic Process Analog_IP 55nm Bronze
FXOSC045HF0F NO External-R ,frequency 30K~60K ,RC Oscillator . Power:2.0V~3.6V; UMC 55nm EFLASH process. Analog_IP 55nm Bronze
FXOSC045HF0L NO External-R ,frequency 30K~60K ,RC Oscillator . Power:2.0V~3.6V; UMC 55nm LP process. Analog_IP 55nm Silver Minus
FXOSC048HF0L Internal-R, frequency 48MHz/8MHz. Input 1.08V-1.32V; UMC 55nm lp process Analog_IP 55nm Contact Sales
FXOSC048HF0U Internal-R, frequency 48MHz/32MHz/16MHz/8MHz, Input 1.08V-1.32V; UMC 55nm Low K Ultra low power process Analog_IP 55nm Contact Sales
FXOSC060HF0A Output frequency 32KHz. Input 0.9V-1.1V; UMC 55nm SP/RVT LowK Logic Process Analog_IP 55nm Contact Sales
 
FXOSC348HF0U Internal-R, frequency 48KHz. Input 1.14v-3.63v; UMC 55nm ULP process Analog_IP 55nm Contact Sales
 
 
Analog > Clock
> PLL > 20M ~ 500M, Generic PLL 
Cell Name Descriptions Type Process Gradation Literature
FXPLL004HF0L Input 2MHz~16MHz, output 16~72MHz and 72MHz~200MHz, 1.08~1.32V PLL; UMC 55nm Low Power Process. Analog_IP 55nm Silver Minus
FXPLL010HF0A Input 10M-310M Hz, output 20M-310M Hz, frequency synthesizable PLL; UMC 55nm SP/RVT Process Analog_IP 55nm Contact Sales
 
FXPLL010HF0L Input 10M-200M Hz, output 20M-300M Hz, frequency synthesizable PLL; UMC 55nm LP/RVT Low-K Logic Process Analog_IP 55nm Silver
FXPLL060HF0A Input 20M-200M Hz, output 20M-300M Hz, frequency synthesizable PLL; UMC 55nm SP/RVT Low-K Logic Process Analog_IP 55nm Silver
FXPLL327HF0L Input 32.768KHz, Output 12 and 48MHz PLL; UMC 55nm LP/RVT Logic Process Analog_IP 55nm Silver
FXPLL362HF0L Input 200MHz - 400MHz, output clock_1X 200MHz - 400MHz, output clock_2X 400MHz - 800MHz, output clock_4X 800MHz-1600MHz,frequency synthesizable PLL;UMC 55nm LP/RVT LowK Logic process Analog_IP 55nm Silver Minus
FXPLLG011HF0L Input 10M-200M Hz, output 20M-400M Hz, frequency synthesizable PLL; UMC 55nm LP/RVT Low-K Logic Process Analog_IP 55nm Contact Sales
 
 
Analog > Clock
> PLL > 500M ~ 1G, Generic PLL 
Cell Name Descriptions Type Process Gradation Literature
FXPLL032HF0A Input 10M-200M Hz, output 300M-600M Hz, frequency synthesizable PLL ; UMC 55nm SP Low-K Logic Process Analog_IP 55nm Silver
FXPLL033HF0A Input 20M-50M Hz, output 300M-600M Hz, frequency synthesizable PLL; UMC 55nm SP/RVT process Analog_IP 55nm Silver Minus
FXPLL350HF0A Input 33.33M-100M Hz, output 400M-800M Hz, frequency synthesizable PLL; UMC 55nm SP-RVT Low-K process Analog_IP 55nm Silver
FXPLL360HF0F Input 20M-66M Hz, output 400M-800M Hz, frequency synthesizable PLL; UMC 55nm EFLASH RVT LowK Logic Process Analog_IP 55nm Silver Minus
FXPLL360HF0G Input 20M-66M Hz, output 400M-800M Hz, frequency synthesizable PLL; UMC 55nm EFLASH/EE2PROM ULP RVT LowK Logic Process Analog_IP 55nm Silver Minus
FXPLL360HF0L Input 25M-66M Hz, output 400M-800M Hz, frequency synthesizable PLL; UMC 55nm LP/RVT LowK Logic Process Analog_IP 55nm Silver
FXPLL610HF0F Input 2MHz~16MHz, output 16~1000MHz, 1.08~1.32V small-size PLL; UMC 55nm Eflash Process. Analog_IP 55nm Bronze
 
Analog > Clock
> PLL > over 1G, Generic PLL 
Cell Name Descriptions Type Process Gradation Literature
FXPLL080HF0A Input 12MHz, output 800 MHz/1000MHz, 533 MHz/666 MHz, 400 MHz/500 MHz, 266 MHz/533 MHz, frequency synthesizable PLL; UMC 55nm SP/RVT LowK Logic Process Analog_IP 55nm Silver
FXPLL080HF0A_MTD Input 12MHz, output 900 MHz/1200MHz, 600 MHz/800 MHz, 360 MHz/480MHz, 300 MHz/400MHz, frequency synthesizable PLL; UMC 55nm SP/RVT LowK Logic Process Analog_IP 55nm Contact Sales
 
FXPLL150HF0A Input 33M-300M Hz, output 1000M-1500M Hz, frequency synthesizable PLL; UMC 55nm SP-RVT Low-K process Analog_IP 55nm Silver
FXPLL362HF0A Input 200M-400M Hz, output 800M-1600M,400-800MHz and 200-400MHz , frequency synthesizable PLL; UMC 55nm SP/RVT LowK Logic Process Analog_IP 55nm Silver Minus
 
Analog > Clock
> SSCG > over 1G, SSCG 
Cell Name Descriptions Type Process Gradation Literature
FXSSCG602HF0A Input clock range:5 ~ 1280 MHz, output clock range:15.625 ~ 2000 MHz wide-range SSCG; UMC 55nm SP process. Analog_IP 55nm Silver
FXSSCG602HF0L Input clock range:5 ~ 1280 MHz, output clock range:15.625 ~ 2000 MHz wide-range SSCG; UMC 55nm LP process. Analog_IP 55nm Silver