Logic Libraries

Updated On:2018-01-23
Gradation
Faraday IPs are rated according to the IPs’ maturity and customer acceptance. They are graded by the rules described as below,


Platinum P Five (5) productions verified
Gold G Mass production proven
Silver S Silicon proven, Formal release
Silver Minus S- Manufacturing onging
Bronze B Pre-Silicon release
 
Logic Libraries > Generic Core Cell Library
> 6-Track Library > 6T HVT Library 
Cell Name Descriptions Type Process Gradation Literature
FSF0U_JHS_GENERIC_CO
RE
UMC 55nm ULP/HVT Low-K Logic Process Process 6-track Generic Core Cell Library (C60) w/ Forward Bias. W/ deep Nwell Library_Group 55nm Silver
 
Logic Libraries > Generic Core Cell Library
> 6-Track Library > 6T LVT Library 
Cell Name Descriptions Type Process Gradation Literature
FSF0U_JLS_GENERIC_CO
RE
UMC 55nm ULP/LVT Low-K Logic Process Process 6-track Generic Core Cell Library (C60) Library_Group 55nm Silver
 
Logic Libraries > Generic Core Cell Library
> 6-Track Library > 6T RVT Library 
Cell Name Descriptions Type Process Gradation Literature
FSF0U_JRS_GENERIC_CO
RE
UMC 55nm ULP/RVT Low-K Logic Process Process 6-track Generic Core Cell Library (C60). W/O deep Nwell Library_Group 55nm Silver
 
Logic Libraries > Generic Core Cell Library
> 6-Track Library > 6T uHVT Library 
Cell Name Descriptions Type Process Gradation Literature
FSF0U_JUS_GENERIC_CO
RE
UMC 55nm uLP/uHVT LowK Logic Process Ultra High Density (6T) Generic Core Cell Library Library_Group 55nm Silver
FSF0U_JUU_GENERIC_CO
RE
UMC 55nm ULP/uHVT Low-K Logic Process Process 6-track Generic Core Cell Library (C90) w/ Forward Bias. W/ deep Nwell. Library_Group 55nm Silver