Interface Solution |
Updated On:2018-04-25 |
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Interface Solution > DDR |
> DDR PHY - Command/Address > DDR1 - Command/Address |
Cell Name |
Descriptions |
Type |
Process |
Gradation |
Literature |
FXDDR1A173HF0A
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DDR1/MDDR PHY CMD/ADDR BLOCK ; UMC 55nm SP/RVT with 2.5V device LowK Logic Process |
Analog_IP |
55nm |
Bronze
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