Analog

Updated On:2018-04-25
Gradation
Faraday IPs are rated according to the IPs’ maturity and customer acceptance. They are graded by the rules described as below,


Platinum P Five (5) productions verified
Gold G Mass production proven
Silver S Silicon proven, Formal release
Silver Minus S- Manufacturing onging
Bronze B Pre-Silicon release
 
Analog > Clock
> PLL > over 1G, Generic PLL 
Cell Name Descriptions Type Process Gradation Literature
FXPLL080HF0A Input 12MHz, output 800 MHz/1000MHz, 533 MHz/666 MHz, 400 MHz/500 MHz, 266 MHz/533 MHz, frequency synthesizable PLL; UMC 55nm SP/RVT LowK Logic Process Analog_IP 55nm Silver
FXPLL080HF0A_MTD Input 12MHz, output 900 MHz/1200MHz, 600 MHz/800 MHz, 360 MHz/480MHz, 300 MHz/400MHz, frequency synthesizable PLL; UMC 55nm SP/RVT LowK Logic Process Analog_IP 55nm Contact Sales
 
FXPLL150HF0A Input 33M-300M Hz, output 1000M-1500M Hz, frequency synthesizable PLL; UMC 55nm SP-RVT Low-K process Analog_IP 55nm Silver
FXPLL362HF0A Input 200M-400M Hz, output 800M-1600M,400-800MHz and 200-400MHz , frequency synthesizable PLL; UMC 55nm SP/RVT LowK Logic Process Analog_IP 55nm Silver Minus