Updated On:2018-01-23
Faraday IPs are rated according to the IPs’ maturity and customer acceptance. They are graded by the rules described as below,

Platinum P Five (5) productions verified
Gold G Mass production proven
Silver S Silicon proven, Formal release
Silver Minus S- Manufacturing onging
Bronze B Pre-Silicon release
Analog > Analog Front Ends
> Image Processing AFE 
Cell Name Descriptions Type Process Gradation Literature
FXAFE010HF0A FXAFE010HF0A is an Analog Front End IP for CMOS image processing applications. FXAFE010HF0A is fabricated in UMC 55nm SP, low-k, logic process to enable size reduction and utilizes an 8-bit Programmable Gain Amplifier (PGA) with a 2:1 input multiplexer, a 10-bit pipelined analog-to-digital converter (ADC), and a 10-bit offset correction digital-to-analog converter (DAC) to implement a signal processing solution for scanners, video and CMOS imaging applications. Analog_IP 55nm Silver