Faraday has collaborated with Infineon to develop a SONOS eFlash platform on UMC’s 40nm uLP process. This platform encompasses eFlash subsystem IP, including controller, timing, and cache functions, with a complete eFlash testing solution. The subsystem IP can facilitate the utilization of flash memory technology and accelerate customer’s product development with easy-to-integrate and fast data access features. It, moreover, simplifies SONOS eFlash testing with a built-in self-test (BIST) function to provide customers solid quality advantages. The total solution is designed to meet the demands of AI, smart grid, IoT, and MCU applications.

 

Infineon SONOS eFlash

  • Spec. highlights
    • Low power-consumption in programming, erase and standby modes
    • Robust endurance of over 100K cycles (-40℃ to 125℃)
    • Excellent data retention (>10yrs @ 85℃)
    • Meet the requirement for consumer, industrial and automotive applications (Temperature Grade 2)
  • Economical of time and cost
    • Far fewer additional mask layers to save wafer manufacturing cycle time and cost
    • Fully compatible with 40uLP logic process which allows IP re-use
  • Mass-production proven
    • Successfully delivered abundant mass-production projects since 2017
    • 256Kb~16Mb SONOS eFlash inside
    • High wafer sort yields and low DPPM

 

SONOS eFlash Platform

  • Shorten time-to-market
    • Facilitate the integration of flash memory technology and accelerate product development
  • Complete IP solutions
    • Contain a flash memory block, controller and the subsystem IP
    • Include essential bus interface, integrated clock control circuits and additional features, such as automatic eFlash initialization, simplified erase/write procedure to offload CPU overhead, read/write protection, and a pseudo random write buffer
  • BIST for easy test
    • The built-in BIST allows to test on general testing equipment to shorten testing time
    • Ensure the flash memory quality and reliability

 

Success Case

  • IoT platform application
  • PBS (platform-based service) assisted in integrating the customer’s proprietary IPs with Faraday IP solutions from early FPGA architecture verification
  • Faraday provides
    • 40uLP mixed mode IPs, like ADC, PLL, OSC, USB 2.0 OTG
    • Digital IP solutions for MCU application, including SCU, watch dog timer, UART, I2C, SSP, SD controller and GbEthernet MAC