2-Port Register File

Updated On:2018-07-18
Gradation
Faraday IPs are rated according to the IPs’ maturity and customer acceptance. They are graded by the rules described as below,


Platinum P Five (5) productions verified
Gold G Mass production proven
Silver S Silicon proven, Formal release
Silver Minus S- Manufacturing onging
Bronze B Pre-Silicon release
 
Memory Compiler > 2-Port Register File
> 8TSRAM > High Density 2PRF, 8TSRAM 
Cell Name Descriptions Type Process Gradation Literature
FS90A_C_SZ UMC 0.25um Logic process standard synchronous two-port register file compiler. Memory_IP 0.25um Gold
 
FSA0A_C_SZ UMC 0.18um Logic GII process standard synchronous two port (1R1W) register file SRAM memory compiler. Memory_IP 0.18um Platinum
FSA0M_A_SZ UMC 0.18UM Mixed Mode/RF; Two Port Register File Memory_IP 0.18um Contact Sales
 
FSC0G_D_SZ UMC 0.13um Logic SP (FSG) process standard synchronous two port (1R1W) register file SRAM memory compiler. Memory_IP 0.13um Silver
FSC0H_D_SZ UMC 0.13um logic HS(FSG) Process Synchronous two port register file SRAM memory compiler. Memory_IP 0.13um Platinum
FSC0L_D_SZ UMC 0.13um Logic LL (FSG) process high density synchronous two port register file SRAM memory compiler. Memory_IP 0.13um Platinum
FSC0U_D_SZ UMC 0.13um HS/LL fusion (FSG) process high density synchronous two port register file SRAM memory compiler. Memory_IP 0.13um Gold
FSD0A_A_SZ UMC 90nm Logic SP (LowK) process standard synchronous two port (1R1W) register file SRAM memory compiler. Memory_IP 90nm Platinum
FSD0K_A_SZ UMC 90nm LL/RVT Synchronous high density two-port register file memory compiler Memory_IP 90nm Silver
FSE0A_A_SZ UMC 0.65um SP/RVT LowK logic process synchronous two-port register file memory compiler Memory_IP 65nm Silver
FSE0K_A_SZ UMC 65nm LL/RVT (Low K) logic process standard synchronous high density two port register file SRAM memory compiler. Memory_IP 65nm Silver
FSF0A_A_SZ UMC 55nm SP LowK Logic Process standard synchronous two port register file memory compiler. Memory_IP 55nm Silver
FSF0A_L_SZ UMC 55nm Standard Performance LowK Logic Process Two-Port Register File Memory_IP 55nm Contact Sales
 
FSF0F_A_SZ UMC 55nm EFLASH Process Two Port Register File Memory_IP 55nm Bronze
FSF0L_A_SZ UMC 55nm LP Logic Process Synchronous 2-Port Register File Memory Compiler Memory_IP 55nm Silver
FSF0L_L_SZ UMC 55nm LP/Low-K process PG Two Port Register File compiler. Memory_IP 55nm Silver Minus
FSH0L_A_SZ UMC 40nm LP/RVT LowK Logic 2-Port Register File Memory Compiler Memory_IP 40nm Silver
FSH0L_B_SZ UMC 40nm LP/Low-K process ; Two Port Register File memory compiler Memory_IP 40nm Silver
FSH0L_L_SZ 40LP 2PRF with Sleep/Retention/Nap mode feature Memory_IP 40nm Silver Minus
FSJ0C_A_SZ UMC 28nm HPC process Two Port Register File Memory_IP 28nm Silver Minus
FSJ0C_A_SZB2 UMC 28nm HPC process 2PRF with Bank2 Memory_IP 28nm Bronze
 
FSJ0C_A_SZB4 UMC 28nm HPC process Two Port Register File with Bank2 Memory_IP 28nm Bronze
FSJ0L_A_SZ UMC 28nm HLP/Low-K 2PRF compiler Memory_IP 28nm Silver Minus
FSL0A_C_SZ UMC 0.153um Mixed-Mode/Logic process standard synchronous two port (1R1W) register file SRAM memory compiler Memory_IP 0.153um Silver
FSP0A_C_SZ UMC 0.162um Logic process standard synchronous two port register file SRAM memory compiler. Memory_IP 0.162um Silver
 
FSR0B_D_SZ UMC 0.11um HS/ALE Logic Process synchronous two port register file memory compiler Memory_IP 0.11um Platinum
 
FSR0F_C_SZ UMC 0.11um eFlash HS process; Two Port Register File Memory_IP 0.11um Silver
FSR0H_B_SZ UMC 0.11um HS/FSG Logic Process Synchronous 2PRF with 339cell Memory Compiler Memory_IP 0.11um Silver
FSR0H_D_SZ UMC 0.11um HS Logic process standard synchronous two port register file SRAM memory compiler Memory_IP 0.11um Platinum
FSR0K_D_SZ UMC 0.11um LL/ALE Logic process standard synchronous high density two port register file SRAM memory compiler. Memory_IP 0.11um Silver
FSR0L_D_SZ UMC 0.11um Logic(LL) FSG process synchronous two port register file memory compiler Memory_IP 0.11um Gold
FSR0P_A_SZ 110AE eFlsh LL process 2 Port RF Memory_IP 0.11um Silver
FSR0T_D_SZ UMC 0.11um SP/AE (AL Advance Enhancement) Logic Process synchronous two port SRAM memory compiler. Memory_IP 0.11um Silver