Dual-Port SRAM

Updated On:2018-07-18
Gradation
Faraday IPs are rated according to the IPs’ maturity and customer acceptance. They are graded by the rules described as below,


Platinum P Five (5) productions verified
Gold G Mass production proven
Silver S Silicon proven, Formal release
Silver Minus S- Manufacturing onging
Bronze B Pre-Silicon release
 
Memory Compiler > Dual-Port SRAM
> 8TSRAM > High Density DPSRAM, 8TSRAM, Peri LVT, Power Gating 
Cell Name Descriptions Type Process Gradation Literature
FSH0L_L_SJLVT UMC 40nm LP LowK Logic Process ULL Dual-Port SRAM Memory Compiler with Peri-LVT Memory_IP 40nm Silver Minus
FSH0L_L_SJLVTRED UMC 40NM Low-K Low Power synchronous Feature Dual Port SRAM memory compiler Memory_IP 40nm Bronze