Updated On:2018-07-22
Faraday IPs are rated according to the IPs’ maturity and customer acceptance. They are graded by the rules described as below,

Platinum P Five (5) productions verified
Gold G Mass production proven
Silver S Silicon proven, Formal release
Silver Minus S- Manufacturing onging
Bronze B Pre-Silicon release
Interface Solution > DDR
> DDR PHY - Data Block > DDR4 PHY - Data Block 
Cell Name Descriptions Type Process Gradation Literature
FXDDR4D16FC602HH0L Data Block of DDR3/DDR4/LPDDR2/LPDDR3 Combo PHY for Solder bump Flip chip version ; UMC 40nm LP LowK Logic Process Analog_IP 40nm Contact Sales