PowerSlash Core Cell Library

Updated On:2018-07-20
Faraday IPs are rated according to the IPs’ maturity and customer acceptance. They are graded by the rules described as below,

Platinum P Five (5) productions verified
Gold G Mass production proven
Silver S Silicon proven, Formal release
Silver Minus S- Manufacturing onging
Bronze B Pre-Silicon release
Logic Libraries > PowerSlash Core Cell Library
> 12-Track > 12T RVT PSK Library 
Cell Name Descriptions Type Process Gradation Literature
UMC 55nm SP/RVT LowK Logic Process UHS library PSK cells Library_Group 55nm Bronze
UMC 55nm eFlash/RVT Logic Process High Speed 12-track PowerSlash Kit cell library Library_Group 55nm Silver
UMC 55nm LP/RVT LowK Logic Process 12-Tracks Powerslash Core Cell Library Library_Group 55nm Silver
UMC 40nm LP/RVT Logic Process 12-Track High Speed PowerSlash Cell Library (C40) Library_Group 40nm Silver
UMC 28nm HPC/RVT Logic and Mixed-Mode Process 12-track PowerSlash cell library (C35) Library_Group 28nm Bronze
UMC 28nm Logic and Mixed-Mode HLP/RVT Process 12-track Standard POWERSLASH core cell library (C35) Library_Group 28nm Silver
UMC 28nm HLP Process C35 RVT Library (FSJ0L_HRS) PowerSlash Library_Group 28nm Bronze