PowerSlash Core Cell Library

Updated On:2018-07-22
Gradation
Faraday IPs are rated according to the IPs’ maturity and customer acceptance. They are graded by the rules described as below,


Platinum P Five (5) productions verified
Gold G Mass production proven
Silver S Silicon proven, Formal release
Silver Minus S- Manufacturing onging
Bronze B Pre-Silicon release
 
Logic Libraries > PowerSlash Core Cell Library
> 9-Track > 9T LVT PSK Library 
Cell Name Descriptions Type Process Gradation Literature
FSH0L_BLS_POWERSLASH
_CORE
UMC 40nm LP/LVT Logic Process 9-Track Standard Cell Library (PowerSlash Core) Library_Group 40nm Silver
FSH0L_XLS_POWERSLASH
_CORE
UMC 40nm LP/LVT Logic Process SYNS-like 9T POWERSLASH Cell Library Library_Group 40nm Contact Sales
 
FSH0V_ALS_POWERSLASH
_CORE
UMC 40nm HV/LVT Logic Process 9-Track Standard Cell Library (PowerSlash Core) Library_Group 40nm Bronze
FSJ0C_CLS_POWERSLASH
_CORE
UMC 28nm HPC/LVT Logic and Mixed-Mode Process 9-track POWERSLASH cell library enhanced for routing (C35) Library_Group 28nm Bronze
 
FSJ0L_BLS_POWERSLASH
_CORE
UMC 28nm HLP/LVT Logic Process 9-track Powerslash standard core cell library (C35) Library_Group 28nm Silver
FSJ0L_CLS_POWERSLASH
_CORE
UMC 28nm HLP/LVT Logic and Mixed-Mode Process 9-track M1+ (C35) powerslash cell library Library_Group 28nm Bronze
 
FSJ0P_CLS_POWERSLASH
_CORE
UMC 28nm Logic/Mixed-Mode HPC+ Process 9 track LVT C35 Powerslash cell library Library_Group 28nm Contact Sales
 
FSN0U_CLS_POWERSLASH
_CORE
UMC 22nm ULP/LVT Logic and Mixed-Mode Process 9-track POWERSLASH cell library enhanced for routing (C35) Library_Group 22nm Contact Sales