Clock

Updated On:2018-07-18
Gradation
Faraday IPs are rated according to the IPs’ maturity and customer acceptance. They are graded by the rules described as below,


Platinum P Five (5) productions verified
Gold G Mass production proven
Silver S Silicon proven, Formal release
Silver Minus S- Manufacturing onging
Bronze B Pre-Silicon release
 
Analog > Clock
> PLL > 500M ~ 1G, Generic PLL 
Cell Name Descriptions Type Process Gradation Literature
FXPCPLL050HF0A_APGD Input 40k-110kHz, output 72M-594MHz, frequency synthesizable PLL; UMC 55 nm Logic SP/RVT Low-K Process Analog_IP 55nm Bronze
 
FXPLL030HE0K Input 1M-5M Hz, output 15M-600M Hz, frequency synthesizable PLL; UMC 65nm LL-RVT Low-K process Analog_IP 65nm Silver Minus
FXPLL032HD0A Input 10M-200M Hz, output 300M-600M Hz, frequency synthesizable PLL ; UMC 90nm SP/RVT Low-K Logic Process Analog_IP 90nm Gold
FXPLL032HD0K Input 20M-200M Hz, output 300M-600M Hz, frequency synthesizable PLL ; UMC 90nm Low Leakage (RVT) Low-K Process Analog_IP 90nm Silver
FXPLL032HE0K Input 20M-200M Hz, output 300M-600M Hz, frequency synthesizable PLL; UMC 65nm Logic LL-RVT Low-K 1P10M process Analog_IP 65nm Silver
FXPLL032HF0A Input 10M-200M Hz, output 300M-600M Hz, frequency synthesizable PLL ; UMC 55nm SP Low-K Logic Process Analog_IP 55nm Silver
FXPLL032HR0B Input 6M-180MHz, output 165M-660MHz, frequency synthesizable PLL; UMC 0.11um HS/AE (AL Advanced Enhancement) Logic Process Analog_IP 0.11um Bronze
FXPLL033HF0A Input 20M-50M Hz, output 300M-600M Hz, frequency synthesizable PLL; UMC 55nm SP/RVT process Analog_IP 55nm Silver Minus
FXPLL062HD0A Input 156.25 MHz, output 625 MHz, frequency synthesizable PLL; UMC 90nm SP/RVT LowK Logic Process. Analog_IP 90nm Silver Minus
FXPLL080HE0A Input 25-33.33 MHz, output 600 MHz/800 MHz, 400 MHz/533 MHz, 200 MHz/266 MHz frequency synthesizable PLL; UMC 65nm SP/RVT Low-K Logic Process Analog_IP 65nm Silver Minus
FXPLL350HC0H Input 66.66M Hz, output 400M-800M Hz, frequency synthesizable PLL; UMC 0.13um HS/FSG Logic process Analog_IP 0.13um Silver
 
FXPLL350HD0A Input 66M-100M Hz, output 400M-800M Hz, frequency synthesizable PLL; UMC 90nm Logic SP process Analog_IP 90nm Silver Minus
FXPLL350HF0A Input 33.33M-100M Hz, output 400M-800M Hz, frequency synthesizable PLL; UMC 55nm SP-RVT Low-K process Analog_IP 55nm Silver
FXPLL360HE0L Input 25M-66M Hz, output 400M-800M Hz, frequency synthesizable PLL; UMC 65nm LP/RVT LowK Logic Process Analog_IP 65nm Bronze
FXPLL360HF0F Input 20M-66M Hz, output 400M-800M Hz, frequency synthesizable PLL; UMC 55nm EFLASH RVT LowK Logic Process Analog_IP 55nm Silver Minus
FXPLL360HF0G Input 20M-66M Hz, output 400M-800M Hz, frequency synthesizable PLL; UMC 55nm EFLASH/EE2PROM ULP RVT LowK Logic Process Analog_IP 55nm Silver Minus
FXPLL360HF0L Input 25M-66M Hz, output 400M-800M Hz, frequency synthesizable PLL; UMC 55nm LP/RVT LowK Logic Process Analog_IP 55nm Silver
FXPLL360HH0L Input 25M-66M Hz, output 400M-800M Hz, frequency synthesizable PLL; UMC 40nm LP/RVT Logic Process Analog_IP 40nm Silver
FXPLL360HJ0G Input 25-66M Hz, output 400-800M Hz, frequency synthesizable PLL; UMC 28nm HPM Logic Process Analog_IP 28nm Silver Minus
FXPLL510HH0L_DPHY Input 6M-27M Hz, output 10M-850M Hz, frequency synthesizable PLL; UMC 40nm Logic LP RVT and LVT process Analog_IP 40nm Silver
FXPLL512HJ0C_DPHY Input 12M Hz, output 40M-850M Hz, frequency synthesizable PLL; UMC 28nm HPC Logic Process Analog_IP 28nm Bronze
FXPLL610HF0F Input 2MHz~16MHz, output 16~1000MHz, 1.08~1.32V small-size PLL; UMC 55nm Eflash Process. Analog_IP 55nm Bronze
FXPLLLV362HH0L This IP for DDR4, Input 200MHz - 800MHz, output clock_1X 200MHz - 800MHz, output clock_2X 400MHz - 1600MHz, output,frequency synthesizable PLL; UMC 40nm LP Logic Process Analog_IP 40nm Contact Sales