LVDS

Updated On:2018-07-20
Gradation
Faraday IPs are rated according to the IPs’ maturity and customer acceptance. They are graded by the rules described as below,


Platinum P Five (5) productions verified
Gold G Mass production proven
Silver S Silicon proven, Formal release
Silver Minus S- Manufacturing onging
Bronze B Pre-Silicon release
 
Interface Solution > LVDS
> FPD LVDS Transmitter 
Cell Name Descriptions Type Process Gradation Literature
FXLVTX020HA0A 0.18um TX PAD; UMC 0.18um LOGIC RVT-FSG Process. Analog_IP 0.18um Silver
FXLVTX020HC0H 0.13um LVDS TX I/O PAD; UMC 0.13um HS HVT-FSG Process Analog_IP 0.13um Silver
FXLVTX020HF0A 2.5V LVDS Transmitter 16~178MHz; 55nm SP/RVT LowK Logic Process Analog_IP 55nm Silver
FXLVTX020HH0L 2.5V FPD-link LVDS Transmitter 16~178.6MHz; UMC 40nm LP Low-K process Analog_IP 40nm Bronze
FXLVTX020HJ0C 3.3V FPD-link LVDS Transmitter 16~100MHz; UMC 28nm HPC process Analog_IP 28nm Contact Sales
FXLVTX020HJ0P 3.3V FPD-link LVDS Transmitter 16~100MHz; UMC 28nm HPC plus proces Analog_IP 28nm Contact Sales
 
FXLVTX020HR0B 0.11um LVDS TX I/O PAD ; UMC 0.11um HS/AE (AL Advanced Enhancement) Logic Process Analog_IP 0.11um Silver Minus
FXLVTX030HD0A Single port LVDS Transmitter PAD 1.25Gbps; UMC 90nm SP/RVT low-K process Analog_IP 90nm Gold
FXLVTX030HF0A 2.5V LVDS Transmitter 700Mbps; UMC 55nm SP LowK Logic Process Analog_IP 55nm Silver
FXLVTX030HH0L 2.5V LVDS Transmitter 700Mbps; UMC 40nm LP LowK Logic Process Analog_IP 40nm Bronze
FXLVTX030HH0L_BUMP 2.5V LVDS Transmitter 700Mbps; UMC 40nm LP LowK Logic Process. (Modify layout ) Analog_IP 40nm Contact Sales
 
FXLVTX030HJ0C LVDS Transmitter 700Mbps; UMC 28nm HPC Process Analog_IP 28nm Contact Sales
 
FXLVTX033HD0A 3.3V LVDS Transmitter 700Mbps; 90nm SP/RVT low-L process Analog_IP 90nm Silver Minus
FXLVTX033HF0A 3.3V LVDS Transmitter 700Mbps;UMC 55nm SP/RVT LowK PROCESS Analog_IP 55nm Silver
FXLVTX040HH0L 3.3V LVDS Transmitter 700Mbps; UMC 40nm LP LowK Logic Process Analog_IP 40nm Bronze
FXLVTX050HH0L 2.5V LVDS Transmitter 1.25Gbps; UMC 40nm LP LowK Logic Process. Analog_IP 40nm Bronze
FXLVTX081HA0A 1.8V/3.3V 85MHz 35:5 LVDS Transmitter; UMC 0.18um GII logic process. Analog_IP 0.18um Silver
 
FXLVTX100HF0A 100MHz Reference Clock Single-end to Differential Buffer for PCIE Gen.II; UMC 55nm SP/RVT LowK Logic Process Analog_IP 55nm Silver Minus
FXLVTX100HH0L 100MHz single-ended to differential clock buffer for UMC 40nm LP. Analog_IP 40nm Bronze
FXLVTX169HC0H 100MHz Reference Clock Single-end to Differential Buffer for PCIE Gen.I; UMC 0.13um HS/FSG LOGIC/MIXEDMODE Enhance Process Analog_IP 0.13um Bronze
FXLVTX320HF0A 3.3V LVDS Transmitter 16~100MHz; 55nm SP/RVT LowK Logic Process Analog_IP 55nm Silver
FXLVTX324HD0A 3.3V 4 channel LVDS Transmitter 8~100MHz; UMC 90nm SP/RVT LowK Process Analog_IP 90nm Bronze