LVDS

Updated On:2018-07-20
Gradation
Faraday IPs are rated according to the IPs’ maturity and customer acceptance. They are graded by the rules described as below,


Platinum P Five (5) productions verified
Gold G Mass production proven
Silver S Silicon proven, Formal release
Silver Minus S- Manufacturing onging
Bronze B Pre-Silicon release
 
Interface Solution > LVDS
> FPD LVDS Receiver 
Cell Name Descriptions Type Process Gradation Literature
FXLVRX020HJ0C LVDS RX Receives serial LVDS signal and de-serialize them into parallel format ; UMC 28nm HPC Logic Process Analog_IP 28nm Contact Sales
FXLVRX020HJ0P UMC 28nm HPC+ Logic Process, LVDS RX Receives serial LVDS signal and de-serialize them into parallel format Analog_IP 28nm Contact Sales
 
 
Interface Solution > LVDS
> FPD LVDS Transmitter 
Cell Name Descriptions Type Process Gradation Literature
FXLVTX020HJ0C 3.3V FPD-link LVDS Transmitter 16~100MHz; UMC 28nm HPC process Analog_IP 28nm Contact Sales
FXLVTX020HJ0P 3.3V FPD-link LVDS Transmitter 16~100MHz; UMC 28nm HPC plus proces Analog_IP 28nm Contact Sales
 
FXLVTX030HJ0C LVDS Transmitter 700Mbps; UMC 28nm HPC Process Analog_IP 28nm Contact Sales
 
 
Interface Solution > LVDS
> IO LVDS Receiver 
Cell Name Descriptions Type Process Gradation Literature
FXLVIORX1105EWHJ0C 28nm HPC, LVDS RXIO, 500Mbps, 1.8V/0.9V Analog_IP 28nm Contact Sales
FXLVIORX1105NSHJ0C 28nm HPC, LVDS RXIO, 500Mbps, 1.8V/0.9V Analog_IP 28nm Contact Sales
 
 
Interface Solution > LVDS
> Sub-LVDS Receiver 
Cell Name Descriptions Type Process Gradation Literature
FXSLVRX112HJ0C 1.8V Sub-LVDS Receiver 650Mbps; UMC 28nm HPC process Analog_IP 28nm Contact Sales