Memory Compiler

Updated On:2018-07-22
Gradation
Faraday IPs are rated according to the IPs’ maturity and customer acceptance. They are graded by the rules described as below,


Platinum P Five (5) productions verified
Gold G Mass production proven
Silver S Silicon proven, Formal release
Silver Minus S- Manufacturing onging
Bronze B Pre-Silicon release
 
Memory Compiler > 1-Port SRAM
> 6TSRAM > High Density 1PSRAM, 6TSRAM 
Cell Name Descriptions Type Process Gradation Literature
FSJ0C_B_SH UMC 28nm Logic process standard synchronous RVT periphery high density single port SRAM memory compiler. Memory_IP 28nm Bronze
FSJ0C_B_SHR1 UMC 28nm Logic process standard synchronous RVT periphery high density single port SRAM memory compiler with row redundancy. Memory_IP 28nm Bronze
FSJ0C_D_SH UMC 28nm HPC Logic Process Ultra High Density Single-Port SRAM Memory Compiler Memory_IP 28nm Silver Minus
FSJ0G_B_SH UMC 28nm HPM process standard synchronous high density single port SRAM memory compiler Memory_IP 28nm Silver Minus
FSJ0L_B_SH High Density Single Port SRAM, UMC 28nm HLP process Memory_IP 28nm Silver Minus
FSJ0L_B_SHC1 UMC 28nm HLP process standard synchronous high density single port SRAM memory compiler. Memory_IP 28nm Contact Sales
 
FSJ0L_B_SHR1 UMC 28nm HLP standard synchronous high density single port SRAM memory compiler. Memory_IP 28nm Bronze
FSJ0L_B_SHR1C1 UMC 28nm HLP process standard synchronous High density single port SRAM memory compiler. Memory_IP 28nm Contact Sales