Memory Compiler

Updated On:2018-07-16
Gradation
Faraday IPs are rated according to the IPs’ maturity and customer acceptance. They are graded by the rules described as below,


Platinum P Five (5) productions verified
Gold G Mass production proven
Silver S Silicon proven, Formal release
Silver Minus S- Manufacturing onging
Bronze B Pre-Silicon release
 
Memory Compiler > ROM
> VIA1 ROM > VIA1 ROM, Peri HVT 
Cell Name Descriptions Type Process Gradation Literature
FSJ0C_L_SPHVT UMC 28nm HPC Logic Process Via ROM Low Power Compiler with HVT peripheral Memory_IP 28nm Bronze
FSJ0P_A_SPHVT UMC 28nm logic-mixed MODE28N-HPCUP synchronous Contact ROM memory compiler. Memory_IP 28nm Contact Sales