Interface Solution

Updated On:2018-07-16
Faraday IPs are rated according to the IPs’ maturity and customer acceptance. They are graded by the rules described as below,

Platinum P Five (5) productions verified
Gold G Mass production proven
Silver S Silicon proven, Formal release
Silver Minus S- Manufacturing onging
Bronze B Pre-Silicon release
Interface Solution > USB/OTG
> USB PHY > USB 3.1 PHY 
Cell Name Descriptions Type Process Gradation Literature
FZOTG306HJ0C Cost Down USB 3.1 Gen.1 PHY ; UMC 28nm HPC Logic Process Analog_IP 28nm Contact Sales
FZOTG306NSHJ0P USB 3.1 Gen1 PHY Costdown version ; UMC 28nm HPC+, SVT&LVT Logic Process A+D Part Naming with IO at North-South (NS) Analog_IP 28nm Contact Sales
FZOTG310HJ0C 28nm HPC USB3.1 gen2 PHY(10Gbps) Analog_IP 28nm Contact Sales
FZOTG310HJ0P 28nm HPC+ USB3.1 gen2 PHY(10Gbps) Analog_IP 28nm Contact Sales