Memory Compiler

Updated On:2018-07-22
Faraday IPs are rated according to the IPs’ maturity and customer acceptance. They are graded by the rules described as below,

Platinum P Five (5) productions verified
Gold G Mass production proven
Silver S Silicon proven, Formal release
Silver Minus S- Manufacturing onging
Bronze B Pre-Silicon release
Memory Compiler > Dual-Port SRAM
> 8TSRAM > High Density DPSRAM, 8TSRAM, Power Gating 
Cell Name Descriptions Type Process Gradation Literature
FSH0L_L_SJ UMC 40nm LP Dual Port SRAM compiler with Sleep/Retention mode Memory_IP 40nm Silver Minus
FSH0L_L_SJRED UMC 40nm Low-K Low Power synchronous Feature Dual Port SRAM memory compiler Memory_IP 40nm Silver Minus