Responsibilities

• SerDes PHY Circuit Design:
  • SerDes RX design, include CTLE, PGA, DFE…
  • SerDes TX design, clock buffer distribution, TX driver
  • be familiar with SerDes system operation

Requirements

• One of the key Serdes protocol (PCIe, SATA, USB.etc)
• 5+ years 5G SERDES design experience
• SERDES Receiver, Equalizer, CTLE, Decision-Feedback Equalizer(DFE) experience is a plus
• Capable to communicate in English is a strong plus

Responsibilities

• Digital IP design
• Develop digital IP according to standard or customized specifications
• Maintain IP and write relevant documents
• IC debug support

Requirements

• Familiar with AMBA bus specification: AHB, AXI and ACE
• Familiar with digital IC design process
• Familiar with DDR controller, GMAC controller, SD card controller, Nand flash controller, and AHB/AXI bus controller
• Familiar with SOC system architecture 5. Experience in FPGA verification

Responsibilities

• Digital IC design for USB/SATA/PCI Express/Ethernet/VBO/MIPI related high-speed mixed-signal interface
• High resolution Delta-sigma codec (for audio , FNPLL , sensor ) digital IC design for mixed signal interface

Requirements

• One of the key Serdes protocol (PCIe, SATA, USB, Ethernet, VBO, MIPI and etc)
• Knowledge and design experience of PCS
• Knowledge and design experience of digital flows & FPGA validations
• Hands-on experience on post-silicon debug
• DSP knowledge . scrambling is minimum; best to have knowledge on multiple DSP background (FEC, FFE, FIR, IIR, ECC,...etc)
• Capable to communicate in English is a strong plus

Responsibilities

• Analog circuit design (Bandgap, Regulator, DLL)
• High speed IO circuit design (DDR3/DDR4/LPDDR3/LPDDR2)
• DDR PHY structure design (DDR3/DDR4/LPDDR3/LPDDR2)

Requirements

• Familiar with current industrial CAD tools (Hspice, Laker, virtuoso, spectre )
• Has tape out experience
• Has DDR PHY design experience will be a plus

Responsibilities

• I/O circuit design for high-speed specific interface applications (ex: SD, eMMC, ONFi, DDR, etc.)

Requirements

• Familiar with Hspice and circuit design related tools
• Ability to design analog circuits is a plus
• ESD/Latch-up technical ability is a plus

Responsibilities

• Develop advanced memory compilers, evaluate new memory architectures and methodologies
• Perform memory design QA flow and propose continuous improvement plans
• Provide technical guidance to the memory project reviews

Requirements

• 3+ years of experience in embedded memory design
• Knowledge of device physics, memory compiler design experience is a plus

Responsibilities

• MIPI PHY Circuit Design:
• MIPI PHY TX/RX for CSI or DSI
• MIPI PHY RX combo subLVDS/GPIO

Requirements

• At least 5 years of analog/mixed-signal working experience
• Experienced on MIPI TX/RX design
• Experienced on PLL design will be a plus

Responsibilities

• ASIC digital circuit design, assists customers in formulating specifications and provides technical assistance
• Develop and customer service of SoC hardware integration and verification environment

Requirements

• Familiar with Verilog, synthesis, STA, DFT, function verification & high-level design process.
• Experience in IP or SoC design and development.
• Familiar with SoC development process and verification environment
• Experience in FPGA and familiarity with ARM architecture is preferred
• Experience in IC specification formulation, experience and ability to assist customers in clarifying technical and application issues is preferred