As one of the most critical building blocks in modern communication SoC, Faraday has developed the Ethernet PHY solutions for its ASIC SoC designs and IP licensing from UMC 0.13um to 28nm process. It has been mass-production proven across multiple market segments. Our in-house developed comprehensive testing methodology guarantees high-volume mass-production quality at low cost. The Ethernet solution is specially designed to meet the stringent demand from factory automation and Ethernet Interface Bridge applications.

Faraday's Gigabit Ethernet PHY solution is a DSP-based transceiver for highly integrated SoC. Instead of SiP or external PHY solution, customers can easily integrate this IP into their design to reduce the package/PCB dimension or system BOM cost.

This Gigabit PHY (GbE PHY) is fully compliant with 10BASE-Te / 100BASE-TX / 1000BASE-T (twisted-pair cable), 100BASE-FX (Fiber) Ethernet standards, such as IEEE 802.3, 802.3u, 802.3ab, 802.3az-2010 (Green Ethernet) and ANSI X3.263-1995 (FDDI-TP-PMD).

 

Key Features

  • DSP-based adaptive line equalizer to provide superior immunity to noise and inter-symbol interference
  • Support auto-negotiation
  • Support full-duplex and half-duplex operations
  • Support IO timing programmable MII/GMII/RGMII interface
  • Support auto MDI/MDIX
  • Support auto polarity correction
  • Support low power idle mode

 

Block Diagram

 

Available IP list

 
28HPC+
28HPC
40LP
90nm
0.11um AE
0.13um
10/100 Ethernet PHY - -
10/100/1000 Ethernet PHY - - - -