The 55ULP IPs include Faraday PowerSlash™ IPs, which are the fundamental building blocks for a low-power design, including multi-Vt libraries and a comprehensive power management kit. The featured Turbo Mode effectively shifts the performance curve, helping MCU cores to achieve 2x performance or reduce dynamic power by 40% at nominal clock rates on UMC 55ULP eFlash technology.
| Item | LVT C60 | RVT C60 | HVT C60 | HVT C90 | HVT C60 (PowerSlash™ with Turbo Mode) |
HVT C90 (PowerSlash™ with Turbo Mode) |
uHVT C90 (PowerSlash™ with Turbo Mode) |
Note | |
|---|---|---|---|---|---|---|---|---|---|
| 6T | Base library | - | |||||||
| Power slash kit | - | - | - | - | |||||
| ECO library | - | ||||||||
| 8T | Base library | - | |||||||
| Power slash kit | - | - | - | - | |||||
| ECO library | - | ||||||||
| TGO (RTC) |
Base library | - | - | - | - | - | - | I/O device | |
Features
- 6/8 track high cell for high density and low power requirement
- Up to 80% from RVT to uHVT
- Up to 21% from C60 to C90 for HVT
- Same footprint cell layout for cell fusion for synthesis and P&R
- Wide operation voltage: 1.2V - 0.9V; Vcc_min= 0.81v
- Support Turbo mode to boost performance
- 9T TGO cell library for RTC and always-on circuit
Memory Compiler & I/O IP
| Item | Feature | Readiness |
|---|---|---|
| Memory Compiler | HVT SPRAM | |
| HVT 1PRF | ||
| HVT VIA ROM | ||
| HVT power gating SPRAM | ||
| HVT power gating 1PRF | ||
| HVT power gating VIA ROM | ||
| HVT power gating VIA ROM | ||
| uHVT SPRAM (PowerSlash™ with Turbo Mode) | ||
| uHVT 1PRF (PowerSlash™ with Turbo Mode) | ||
| uHVT VIA (PowerSlash™ with Turbo Mode) | ||
| HVT SPRAM (PowerSlash™ with Turbo Mode) | ||
| HVT 1PRF (PowerSlash™ with Turbo Mode) | ||
| HVT VIA ROM (PowerSlash™ with Turbo Mode) | ||
| I/O | 5VT IO | |
| MV IO | ||
| L/H freq. Xtal IO | ||
| RTC IO | ||
| 3.3V GPIO |
Functional IP
| Item | Feature | Readiness |
|---|---|---|
| Bandgap | Vin : 3.6v ~ 1.0v Output : 0.75v ± 3% IQ : 0.3uA |
|
| LDO | Vin : 3.6v ~ 1.0v Output : 0.9v ± 5% IQ : 0.8uA |
|
| LDO | Vin : 3.6v ~ 1.3v Output : 0.9v /1.2v ± 5% (switchable) IQ : 1uA |
|
| Voltage detector |
Vin : 3.6v ~ 3.0v Low power consumption |
|
| SAR ADC | 12 bit, 1M samples/s VCC: 3.6 ~ 2.7V VDD: 1.2 ~ 0.9V |
|
| R-2R DAC | 10 bit, 1MHz, rail to rail output | |
| RC OSC (HF) | Output : 32M/16M/8M/4M/2M Hz I < 100uA |
|
| RC OSC (LF) | Output : 32KHz I < 10uA |
|
| USB 2.0 | OTG PHY |
